Author: Richard Plangger <planri...@gmail.com>
Branch: s390x-backend
Changeset: r82051:01a7007c80c5
Date: 2016-02-03 08:35 +0100
http://bitbucket.org/pypy/pypy/changeset/01a7007c80c5/

Log:    removed checkpoint/serialization points, zarch is sequentially
        consistent. some small test fixes

diff --git a/pypy/module/_rawffi/test/test_struct.py 
b/pypy/module/_rawffi/test/test_struct.py
--- a/pypy/module/_rawffi/test/test_struct.py
+++ b/pypy/module/_rawffi/test/test_struct.py
@@ -1,4 +1,4 @@
-
+import sys
 from pypy.module._rawffi.structure import size_alignment_pos
 from pypy.module._rawffi.interp_rawffi import TYPEMAP, letter2tp
 
@@ -63,4 +63,7 @@
          for (name, t, size) in fields])
     assert size == 8
     assert pos == [0, 0, 0]
-    assert bitsizes == [0x10000, 0x3e0001, 0x1003f]
+    if sys.byteorder == 'little':
+        assert bitsizes == [0x10000, 0x3e0001, 0x1003f]
+    else:
+        assert bitsizes == [0x1003f, 0x3e0001, 0x10000]
diff --git a/rpython/jit/backend/zarch/callbuilder.py 
b/rpython/jit/backend/zarch/callbuilder.py
--- a/rpython/jit/backend/zarch/callbuilder.py
+++ b/rpython/jit/backend/zarch/callbuilder.py
@@ -200,7 +200,7 @@
         # change 'rpy_fastgil' to 0 (it should be non-zero right now)
         self.mc.load_imm(RFASTGILPTR, fastgil)
         self.mc.XGR(r.SCRATCH, r.SCRATCH)
-        self.mc.sync()
+        # zarch is sequentially consistent
         self.mc.STG(r.SCRATCH, l.addr(0, RFASTGILPTR))
 
 
@@ -221,8 +221,7 @@
         self.mc.BRC(c.NE, l.imm(retry_label - self.mc.currpos())) # retry if 
failed
 
         # CSG performs a serialization
-        # but be sure (testing)
-        self.mc.sync()
+        # zarch is sequential consistent!
 
         self.mc.CGHI(r.r13, l.imm0)
         b1_location = self.mc.currpos()
diff --git a/rpython/jit/backend/zarch/test/test_runner.py 
b/rpython/jit/backend/zarch/test/test_runner.py
--- a/rpython/jit/backend/zarch/test/test_runner.py
+++ b/rpython/jit/backend/zarch/test/test_runner.py
@@ -27,4 +27,4 @@
     add_loop_instructions = "lg; lgr; larl; agr; cgfi; je; j;$"
     # realloc frame takes the most space (from just after larl, to lay)
     bridge_loop_instructions = "larl; lg; cgfi; jhe; lghi; " \
-                               "lgfi;( iihf;)? lgfi;( iihf;)? basr; lg; br;$"
+                               "iilf;( iihf;)? iilf;( iihf;)? basr; lg; br;$"
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