Author: Richard Plangger <[email protected]>
Branch:
Changeset: r83735:99bd59dfb2dd
Date: 2016-04-18 10:50 +0200
http://bitbucket.org/pypy/pypy/changeset/99bd59dfb2dd/
Log: (s390x) overwrote already defined variable, lead to wrong assignment
diff --git a/rpython/jit/backend/zarch/regalloc.py
b/rpython/jit/backend/zarch/regalloc.py
--- a/rpython/jit/backend/zarch/regalloc.py
+++ b/rpython/jit/backend/zarch/regalloc.py
@@ -310,34 +310,26 @@
# uff! in this case, we need to move a forbidden var to another
register
assert len(forbidden_vars) <= 8 # otherwise it is NOT possible to
complete
even, odd = r.r2, r.r3
- even_var = reverse_mapping.get(even, None)
- odd_var = reverse_mapping.get(odd, None)
- if even_var:
- if even_var in forbidden_vars:
- self._relocate_forbidden_variable(even, even_var,
reverse_mapping,
+ old_even_var = reverse_mapping.get(even, None)
+ old_odd_var = reverse_mapping.get(odd, None)
+ if old_even_var:
+ if old_even_var in forbidden_vars:
+ self._relocate_forbidden_variable(even, old_even_var,
reverse_mapping,
forbidden_vars, odd)
else:
- self._sync_var(even_var)
- if odd_var:
- if odd_var in forbidden_vars:
- self._relocate_forbidden_variable(odd, odd_var,
reverse_mapping,
+ self._sync_var(old_even_var)
+ del self.reg_bindings[old_even_var]
+ if old_odd_var:
+ if old_odd_var in forbidden_vars:
+ self._relocate_forbidden_variable(odd, old_odd_var,
reverse_mapping,
forbidden_vars, even)
else:
- self._sync_var(odd_var)
+ self._sync_var(old_odd_var)
+ del self.reg_bindings[old_odd_var]
self.free_regs = [fr for fr in self.free_regs \
if fr is not even and \
fr is not odd]
- if not even_var:
- even_var = TempVar()
- self.longevity[even_var] = (self.position, self.position)
- self.temp_boxes.append(even_var)
- if not odd_var:
- odd_var = TempVar()
- self.longevity[odd_var] = (self.position, self.position)
- self.temp_boxes.append(odd_var)
- assert even_var is not None
- assert odd_var is not None
self.reg_bindings[even_var] = even
self.reg_bindings[odd_var] = odd
return even, odd
@@ -345,6 +337,12 @@
return even, odd
def _relocate_forbidden_variable(self, reg, var, reverse_mapping,
forbidden_vars, forbidden_reg):
+ if len(self.free_regs) > 0:
+ candidate = self.free_regs.pop()
+ self.assembler.regalloc_mov(reg, candidate)
+ self.reg_bindings[var] = candidate
+ reverse_mapping[candidate] = var
+
for candidate in r.MANAGED_REGS:
# move register of var to another register
# thus it is not allowed to bei either reg or forbidden_reg
@@ -355,10 +353,11 @@
if not candidate_var or candidate_var not in forbidden_vars:
if candidate_var is not None:
self._sync_var(candidate_var)
+ del self.reg_bindings[candidate_var]
self.assembler.regalloc_mov(reg, candidate)
assert var is not None
self.reg_bindings[var] = candidate
- reverse_mapping[reg] = var
+ reverse_mapping[candidate] = var
self.free_regs.append(reg)
break
else:
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