Author: Richard Plangger <[email protected]>
Branch: jitlog-32bit
Changeset: r85861:7087aa60a936
Date: 2016-07-25 17:59 +0200
http://bitbucket.org/pypy/pypy/changeset/7087aa60a936/
Log: initialize trace_id with 0 instead of -1
diff --git a/rpython/rlib/rjitlog/rjitlog.py b/rpython/rlib/rjitlog/rjitlog.py
--- a/rpython/rlib/rjitlog/rjitlog.py
+++ b/rpython/rlib/rjitlog/rjitlog.py
@@ -305,7 +305,7 @@
def __init__(self, cpu=None):
self.cpu = cpu
self.memo = {}
- self.trace_id = -1
+ self.trace_id = 0
self.metainterp_sd = None
# legacy
self.logger_ops = None
diff --git a/rpython/rlib/rjitlog/test/test_jitlog.py
b/rpython/rlib/rjitlog/test/test_jitlog.py
--- a/rpython/rlib/rjitlog/test/test_jitlog.py
+++ b/rpython/rlib/rjitlog/test/test_jitlog.py
@@ -56,9 +56,9 @@
logger.finish()
binary = file.read()
is_32bit = chr(sys.maxint == 2**31-1)
- assert binary == (jl.MARK_START_TRACE) + jl.encode_le_addr(0) + \
+ assert binary == (jl.MARK_START_TRACE) + jl.encode_le_addr(1) + \
jl.encode_str('loop') + jl.encode_le_addr(0) + \
- (jl.MARK_TRACE) + jl.encode_le_addr(0) + \
+ (jl.MARK_TRACE) + jl.encode_le_addr(1) + \
(jl.MARK_INPUT_ARGS) + jl.encode_str('') + \
(jl.MARK_INIT_MERGE_POINT) +
b'\x05\x00\x01s\x00i\x08s\x00i\x10s' + \
(jl.MARK_MERGE_POINT) + \
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