Author: Richard Plangger <planri...@gmail.com> Branch: ppc-vsx-support Changeset: r86003:768f96ea1752 Date: 2016-08-03 14:43 +0200 http://bitbucket.org/pypy/pypy/changeset/768f96ea1752/
Log: initializing the vector ext just after the cpu diff --git a/rpython/jit/backend/ppc/runner.py b/rpython/jit/backend/ppc/runner.py --- a/rpython/jit/backend/ppc/runner.py +++ b/rpython/jit/backend/ppc/runner.py @@ -8,7 +8,6 @@ from rpython.jit.backend.ppc.arch import WORD from rpython.jit.backend.ppc.codebuilder import PPCBuilder from rpython.jit.backend.ppc import register as r -from rpython.jit.backend.ppc.detect_feature import detect_vsx class PPC_CPU(AbstractLLCPU): diff --git a/rpython/jit/metainterp/optimizeopt/__init__.py b/rpython/jit/metainterp/optimizeopt/__init__.py --- a/rpython/jit/metainterp/optimizeopt/__init__.py +++ b/rpython/jit/metainterp/optimizeopt/__init__.py @@ -47,10 +47,6 @@ or 'heap' not in enable_opts or 'pure' not in enable_opts): optimizations.append(OptSimplify(unroll)) - cpu = metainterp_sd.cpu - if not cpu.vector_ext.is_setup(): - cpu.vector_ext.setup_once(cpu.assembler) - return optimizations, unroll def optimize_trace(metainterp_sd, jitdriver_sd, compile_data, memo=None): diff --git a/rpython/jit/metainterp/pyjitpl.py b/rpython/jit/metainterp/pyjitpl.py --- a/rpython/jit/metainterp/pyjitpl.py +++ b/rpython/jit/metainterp/pyjitpl.py @@ -1857,6 +1857,7 @@ self.jitlog.setup_once() debug_print(self.jit_starting_line) self.cpu.setup_once() + self.cpu.vector_ext.setup_once(self.cpu.assembler) if not self.profiler.initialized: self.profiler.start() self.profiler.initialized = True _______________________________________________ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit