Author: Richard Plangger <[email protected]>
Branch: ppc-vsx-support
Changeset: r88082:f9fb13244302
Date: 2016-11-02 15:09 +0100
http://bitbucket.org/pypy/pypy/changeset/f9fb13244302/
Log: revert last checkin, check if vector_ext is not None
diff --git a/rpython/jit/backend/x86/runner.py
b/rpython/jit/backend/x86/runner.py
--- a/rpython/jit/backend/x86/runner.py
+++ b/rpython/jit/backend/x86/runner.py
@@ -22,7 +22,7 @@
with_threads = False
frame_reg = regloc.ebp
- vector_ext = X86VectorExt()
+ vector_ext = None
# can an ISA instruction handle a factor to the offset?
load_supported_factors = (1,2,4,8)
@@ -148,7 +148,7 @@
supports_longlong = False
class CPU_X86_64(AbstractX86CPU):
-
+ vector_ext = X86VectorExt()
backend_name = 'x86_64'
NUM_REGS = 16
CALLEE_SAVE_REGISTERS = [regloc.ebx, regloc.r12, regloc.r13, regloc.r14,
regloc.r15]
diff --git a/rpython/jit/metainterp/compile.py
b/rpython/jit/metainterp/compile.py
--- a/rpython/jit/metainterp/compile.py
+++ b/rpython/jit/metainterp/compile.py
@@ -302,7 +302,8 @@
history.cut(cut_at)
return None
- if ((warmstate.vec and jitdriver_sd.vec) or warmstate.vec_all) and
metainterp.cpu.vector_ext.is_enabled():
+ if ((warmstate.vec and jitdriver_sd.vec) or warmstate.vec_all) and \
+ metainterp.cpu.vector_ext and metainterp.cpu.vector_ext.is_enabled():
from rpython.jit.metainterp.optimizeopt.vector import optimize_vector
loop_info, loop_ops = optimize_vector(trace, metainterp_sd,
jitdriver_sd, warmstate,
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