Author: Armin Rigo <ar...@tunes.org> Branch: Changeset: r90576:b2f0ed2ba5b5 Date: 2017-03-05 21:50 +0100 http://bitbucket.org/pypy/pypy/changeset/b2f0ed2ba5b5/
Log: fix comment diff --git a/rpython/jit/backend/x86/regalloc.py b/rpython/jit/backend/x86/regalloc.py --- a/rpython/jit/backend/x86/regalloc.py +++ b/rpython/jit/backend/x86/regalloc.py @@ -998,7 +998,7 @@ size_box = op.getarg(0) assert isinstance(size_box, ConstInt) size = size_box.getint() - # hint: try to move unrelated registers away from eax and edx now + # hint: try to move unrelated registers away from ecx and edx now self.rm.spill_or_move_registers_before_call([ecx, edx]) # the result will be in ecx self.rm.force_allocate_reg(op, selected_reg=ecx) _______________________________________________ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit