Author: Carl Friedrich Bolz <[email protected]>
Branch: regalloc-playground
Changeset: r92212:ce386eba1dfa
Date: 2017-08-22 21:20 +0200
http://bitbucket.org/pypy/pypy/changeset/ce386eba1dfa/
Log: a variable that survives a call gets put into a callee-saved
register
diff --git a/rpython/jit/backend/llsupport/regalloc.py
b/rpython/jit/backend/llsupport/regalloc.py
--- a/rpython/jit/backend/llsupport/regalloc.py
+++ b/rpython/jit/backend/llsupport/regalloc.py
@@ -960,16 +960,13 @@
if not free_regs:
return None
longevityvar = self[v]
+ # check whether there is a fixed register and whether it's free
reg = longevityvar.find_fixed_register(position)
if reg is not None and reg in free_regs:
return reg
- return free_regs[-1]
- # more advanced stuff below, needs tests
-
-
- loc, free_until = self.longevity.longest_free_reg(
- self.position, free_regs)
+ # pick the register that's free the longest
+ loc, free_until = self.longest_free_reg(position, free_regs)
if loc is None:
return None
# YYY could check whether it's best to spill v here, but hard
diff --git a/rpython/jit/backend/llsupport/test/test_regalloc.py
b/rpython/jit/backend/llsupport/test/test_regalloc.py
--- a/rpython/jit/backend/llsupport/test/test_regalloc.py
+++ b/rpython/jit/backend/llsupport/test/test_regalloc.py
@@ -1028,3 +1028,25 @@
("call_i", r0, [r1]),
("guard_false", r0, []),
]
+
+ def test_call_2(self):
+ ops = '''
+ [i0, i1]
+ i2 = int_mul(i0, 2)
+ i3 = int_add(i1, 1)
+ i4 = call_i(ConstClass(f1ptr), i2, descr=f1_calldescr)
+ guard_false(i4) [i3]
+ '''
+ emitted = self.allocate(ops)
+ fp0 = FakeFramePos(0, INT)
+ fp1 = FakeFramePos(1, INT)
+ assert emitted == [
+ ("move", r1, fp0),
+ ("int_mul", r1, [2]),
+ ("move", r4, fp1), # r4 gets picked since it's callee-saved
+ ("int_add", r4, [1]),
+ ("call_i", r0, [r1]),
+ ("guard_false", r0, [r4]),
+ ]
+
+
_______________________________________________
pypy-commit mailing list
[email protected]
https://mail.python.org/mailman/listinfo/pypy-commit
