Author: Carl Friedrich Bolz-Tereick <[email protected]>
Branch:
Changeset: r95975:26471ac5ce5f
Date: 2019-02-12 19:56 +0100
http://bitbucket.org/pypy/pypy/changeset/26471ac5ce5f/
Log: try to fix arm
diff --git a/rpython/jit/backend/arm/regalloc.py
b/rpython/jit/backend/arm/regalloc.py
--- a/rpython/jit/backend/arm/regalloc.py
+++ b/rpython/jit/backend/arm/regalloc.py
@@ -305,9 +305,8 @@
operations = cpu.gc_ll_descr.rewrite_assembler(cpu, operations,
allgcrefs)
# compute longevity of variables
- longevity, last_real_usage = compute_vars_longevity(inputargs,
operations)
+ longevity = compute_vars_longevity(inputargs, operations)
self.longevity = longevity
- self.last_real_usage = last_real_usage
fm = self.frame_manager
asm = self.assembler
self.vfprm = VFPRegisterManager(longevity, fm, asm)
@@ -1062,7 +1061,7 @@
position = self.rm.position
for arg in inputargs:
assert not isinstance(arg, Const)
- if self.last_real_usage.get(arg, -1) <= position:
+ if self.longevity[arg].is_last_real_use_before(position):
self.force_spill_var(arg)
#
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