Author: fijal
Branch: copystrcontents-in-rewrite
Changeset: r96749:805a83055a7d
Date: 2019-06-04 13:45 +0200
http://bitbucket.org/pypy/pypy/changeset/805a83055a7d/
Log: maybe fix ARM
diff --git a/rpython/jit/backend/arm/opassembler.py
b/rpython/jit/backend/arm/opassembler.py
--- a/rpython/jit/backend/arm/opassembler.py
+++ b/rpython/jit/backend/arm/opassembler.py
@@ -834,72 +834,8 @@
else:
assert 0
- #from ../x86/regalloc.py:928 ff.
- def emit_op_copystrcontent(self, op, arglocs, regalloc, fcond):
- assert len(arglocs) == 0
- self._emit_copystrcontent(op, regalloc, fcond, is_unicode=False)
- return fcond
-
- def emit_op_copyunicodecontent(self, op, arglocs, regalloc, fcond):
- assert len(arglocs) == 0
- self._emit_copystrcontent(op, regalloc, fcond, is_unicode=True)
- return fcond
-
- def _emit_copystrcontent(self, op, regalloc, fcond, is_unicode):
- # compute the source address
- args = op.getarglist()
- base_loc = regalloc.rm.make_sure_var_in_reg(args[0], args)
- ofs_loc = regalloc.rm.make_sure_var_in_reg(args[2], args)
- assert args[0] is not args[1] # forbidden case of aliasing
- srcaddr_box = TempVar()
- forbidden_vars = [args[1], args[3], args[4], srcaddr_box]
- srcaddr_loc = regalloc.rm.force_allocate_reg(srcaddr_box,
forbidden_vars)
- self._gen_address_inside_string(base_loc, ofs_loc, srcaddr_loc,
- is_unicode=is_unicode)
- # compute the destination address
- base_loc = regalloc.rm.make_sure_var_in_reg(args[1], forbidden_vars)
- ofs_loc = regalloc.rm.make_sure_var_in_reg(args[3], forbidden_vars)
- forbidden_vars = [args[4], srcaddr_box]
- dstaddr_box = TempVar()
- dstaddr_loc = regalloc.rm.force_allocate_reg(dstaddr_box,
forbidden_vars)
- self._gen_address_inside_string(base_loc, ofs_loc, dstaddr_loc,
- is_unicode=is_unicode)
- # compute the length in bytes
- length_box = args[4]
- length_loc = regalloc.loc(length_box)
- if is_unicode:
- forbidden_vars = [srcaddr_box, dstaddr_box]
- bytes_box = TempVar()
- bytes_loc = regalloc.rm.force_allocate_reg(bytes_box,
forbidden_vars)
- scale = self._get_unicode_item_scale()
- if not length_loc.is_core_reg():
- self.regalloc_mov(length_loc, bytes_loc)
- length_loc = bytes_loc
- assert length_loc.is_core_reg()
- self.mc.MOV_ri(r.ip.value, 1 << scale)
- self.mc.MUL(bytes_loc.value, r.ip.value, length_loc.value)
- length_box = bytes_box
- length_loc = bytes_loc
- # call memcpy()
- regalloc.before_call()
- self.simple_call_no_collect(imm(self.memcpy_addr),
- [dstaddr_loc, srcaddr_loc, length_loc])
- regalloc.rm.possibly_free_var(length_box)
- regalloc.rm.possibly_free_var(dstaddr_box)
- regalloc.rm.possibly_free_var(srcaddr_box)
-
- def _gen_address_inside_string(self, baseloc, ofsloc, resloc, is_unicode):
- if is_unicode:
- ofs_items, _, _ = symbolic.get_array_token(rstr.UNICODE,
- self.cpu.translate_support_code)
- scale = self._get_unicode_item_scale()
- else:
- ofs_items, itemsize, _ = symbolic.get_array_token(rstr.STR,
- self.cpu.translate_support_code)
- assert itemsize == 1
- ofs_items -= 1 # for the extra null character
- scale = 0
- self._gen_address(resloc, baseloc, ofsloc, scale, ofs_items)
+ def emit_op_load_effective_address(self, op, arglocs, regalloc, fcond):
+ self._gen_address(arglocs[4], arglocs[0], arglocs[1], arglocs[2],
arglocs[3])
# result = base_loc + (scaled_loc << scale) + static_offset
def _gen_address(self, result, base_loc, scaled_loc, scale=0,
static_offset=0):
@@ -915,16 +851,6 @@
self.mc.ADD_rr(result.value, base_loc.value, scaled_loc.value)
self.mc.ADD_ri(result.value, result.value, static_offset)
- def _get_unicode_item_scale(self):
- _, itemsize, _ = symbolic.get_array_token(rstr.UNICODE,
- self.cpu.translate_support_code)
- if itemsize == 4:
- return 2
- elif itemsize == 2:
- return 1
- else:
- raise AssertionError("bad unicode item size")
-
def store_force_descr(self, op, fail_locs, frame_depth):
pos = self.mc.currpos()
guard_token = self.build_guard_token(op, frame_depth, fail_locs, pos,
c.AL)
diff --git a/rpython/jit/backend/arm/regalloc.py
b/rpython/jit/backend/arm/regalloc.py
--- a/rpython/jit/backend/arm/regalloc.py
+++ b/rpython/jit/backend/arm/regalloc.py
@@ -873,8 +873,6 @@
prepare_op_gc_load_indexed_r = _prepare_op_gc_load_indexed
prepare_op_gc_load_indexed_f = _prepare_op_gc_load_indexed
- prepare_op_copystrcontent = void
- prepare_op_copyunicodecontent = void
prepare_op_zero_array = void
def _prepare_op_same_as(self, op, fcond):
@@ -899,6 +897,13 @@
resloc = self.force_allocate_reg(op)
return [resloc]
+ def prepare_op_load_effective_address(self, op, fcond):
+ args = op.getarglist()
+ arg0 = self.make_sure_var_in_reg(args[0], args)
+ arg1 = self.make_sure_var_in_reg(args[1], args)
+ res = self.force_allocate_reg(op)
+ return [arg0, arg1, args[2], args[3], res]
+
def prepare_op_call_malloc_nursery(self, op, fcond):
size_box = op.getarg(0)
assert isinstance(size_box, ConstInt)
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