Author: Armin Rigo <[email protected]>
Branch:
Changeset: r96810:c82849260828
Date: 2019-06-17 10:27 +0200
http://bitbucket.org/pypy/pypy/changeset/c82849260828/
Log: fix translation on arm
diff --git a/rpython/jit/backend/arm/opassembler.py
b/rpython/jit/backend/arm/opassembler.py
--- a/rpython/jit/backend/arm/opassembler.py
+++ b/rpython/jit/backend/arm/opassembler.py
@@ -835,8 +835,9 @@
assert 0
def emit_op_load_effective_address(self, op, arglocs, regalloc, fcond):
- self._gen_address(arglocs[4], arglocs[0], arglocs[1], arglocs[3].value,
- arglocs[2].value)
+ static_ofs = op.getarg(2).getint()
+ scale = op.getarg(3).getint()
+ self._gen_address(arglocs[2], arglocs[0], arglocs[1], scale,
static_ofs)
return fcond
# result = base_loc + (scaled_loc << scale) + static_offset
diff --git a/rpython/jit/backend/arm/regalloc.py
b/rpython/jit/backend/arm/regalloc.py
--- a/rpython/jit/backend/arm/regalloc.py
+++ b/rpython/jit/backend/arm/regalloc.py
@@ -902,7 +902,7 @@
arg0 = self.make_sure_var_in_reg(args[0], args)
arg1 = self.make_sure_var_in_reg(args[1], args)
res = self.force_allocate_reg(op)
- return [arg0, arg1, args[2], args[3], res]
+ return [arg0, arg1, res]
def prepare_op_call_malloc_nursery(self, op, fcond):
size_box = op.getarg(0)
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