Author: Maciej Fijalkowski <[email protected]>
Branch: arm64
Changeset: r96861:72e700c17875
Date: 2019-06-25 17:43 +0000
http://bitbucket.org/pypy/pypy/changeset/72e700c17875/

Log:    a bit inefficient, but fix calling

diff --git a/rpython/jit/backend/aarch64/assembler.py 
b/rpython/jit/backend/aarch64/assembler.py
--- a/rpython/jit/backend/aarch64/assembler.py
+++ b/rpython/jit/backend/aarch64/assembler.py
@@ -927,6 +927,8 @@
         elif loc.is_stack():
             self.mc.LDR_ri(r.ip0.value, r.sp.value, pos)
             self.mc.STR_ri(r.ip0.value, r.fp.value, loc.value)
+        elif loc.is_vfp_reg():
+            self.mc.LDR_di(loc.value, r.sp.value, pos)
         else:
             assert False, "wrong loc"
 
@@ -943,7 +945,7 @@
         if loc.is_stack():
             self.mc.STR_di(prev_loc.value, r.fp.value, loc.value)
         elif loc.is_vfp_reg():
-            self.mc.MOV_dd(prev_loc.value, loc.value)
+            self.mc.FMOV_dd(loc.value, prev_loc.value)
         else:
             assert False, "wrong loc"
 
diff --git a/rpython/jit/backend/aarch64/callbuilder.py 
b/rpython/jit/backend/aarch64/callbuilder.py
--- a/rpython/jit/backend/aarch64/callbuilder.py
+++ b/rpython/jit/backend/aarch64/callbuilder.py
@@ -38,19 +38,32 @@
                     non_float_regs.append(free_regs.pop())
                 else:
                     stack_locs.append(arg)
+
+        if stack_locs:
+            adj = len(stack_locs) + (len(stack_locs) & 1)
+            self.mc.SUB_ri(r.sp.value, r.sp.value, adj * WORD)
+            self.current_sp = adj
+            c = 0
+            for loc in stack_locs:
+                self.asm.mov_loc_to_raw_stack(loc, c)
+                c += WORD
+
+        move_back = False
+        if not self.fnloc.is_imm():
+            if self.fnloc.is_core_reg():
+                self.mc.MOV_rr(r.ip1.value, self.fnloc.value)
+            else:
+                assert self.fnloc.is_stack()
+                self.mc.LDR_ri(r.ip1.value, r.fp.value, self.fnloc.value)
+            self.fnloc = r.x8
+            move_back = True
+
         remap_frame_layout(self.asm, non_float_locs, non_float_regs, r.ip0)
         if float_locs:
             remap_frame_layout(self.asm, float_locs, float_regs, r.d8)
-        # move the remaining things to stack and adjust the stack
-        if not stack_locs:
-            return
-        adj = len(stack_locs) + (len(stack_locs) & 1)
-        self.mc.SUB_ri(r.sp.value, r.sp.value, adj * WORD)
-        self.current_sp = adj
-        c = 0
-        for loc in stack_locs:
-            self.asm.mov_loc_to_raw_stack(loc, c)
-            c += WORD
+
+        if move_back:
+            self.mc.MOV_rr(r.x8.value, r.ip1.value)
 
     def push_gcmap(self):
         noregs = self.asm.cpu.gc_ll_descr.is_shadow_stack()
@@ -67,10 +80,10 @@
             self.mc.BL(self.fnloc.value)
             return
         if self.fnloc.is_stack():
-            self.mc.LDR_ri(r.ip0.value, r.fp.value, self.fnloc.value)
-            self.mc.BLR_r(r.ip0.value)
+            assert False, "we should never be here"
         else:
             assert self.fnloc.is_core_reg()
+            assert self.fnloc is r.x8
             self.mc.BLR_r(self.fnloc.value)
 
     def restore_stack_pointer(self):
@@ -197,7 +210,7 @@
         self.mc.STR_di(r.d0.value, r.sp.value, 0)
         self.mc.STR_ri(r.x0.value, r.sp.value, WORD)
         self.mc.BL(self.asm.reacqgil_addr)
-        self.mc.LDR_ri(r.d0.value, r.sp.value, 0)
+        self.mc.LDR_di(r.d0.value, r.sp.value, 0)
         self.mc.LDR_ri(r.x0.value, r.sp.value, WORD)
         self.mc.ADD_ri(r.sp.value, r.sp.value, 2 * WORD)
 
diff --git a/rpython/jit/backend/aarch64/codebuilder.py 
b/rpython/jit/backend/aarch64/codebuilder.py
--- a/rpython/jit/backend/aarch64/codebuilder.py
+++ b/rpython/jit/backend/aarch64/codebuilder.py
@@ -72,11 +72,6 @@
     def MOV_rr(self, rd, rn):
         self.ORR_rr(rd, r.xzr.value, rn)
 
-    def MOV_dd(self, rd, rn):
-        base = 0b00001110101
-        self.write32((base << 21) | (rn << 16) | (0b000111 << 10) | (rn << 5) |
-                     rd)
-
     def UMOV_rd(self, rd, rn):
         base = 0b0100111000001000001111
         self.write32((base << 10) | (rn << 5) | rd)
@@ -224,6 +219,10 @@
         base = 0b10001011000 | (s << 8)
         self.write32((base << 21) | (rm << 16) | (rn << 5) | (rd))
 
+    def FMOV_dd(self, rd, rn):
+        base = 0b0001111001100000010000
+        self.write32((base << 10) | (rn << 5) | rd)
+
     def FADD_dd(self, rd, rn, rm):
         base = 0b00011110011
         self.write32((base << 21) | (rm << 16) | (0b001010 << 10) | (rn << 5) 
| rd)
diff --git a/rpython/jit/backend/test/runner_test.py 
b/rpython/jit/backend/test/runner_test.py
--- a/rpython/jit/backend/test/runner_test.py
+++ b/rpython/jit/backend/test/runner_test.py
@@ -2987,11 +2987,19 @@
                     getter_name,
                     primitive.cdecl(primitive.PrimitiveType[ARG], '*p'),
                     var_name))
+            c_source.append('#include <stdio.h>')
             c_source.append('')
             c_source.append('static void real%s(%s)' % (
                 fn_name, ', '.join(fn_args)))
             c_source.append('{')
             for i in range(len(ARGTYPES)):
+                if ARGTYPES[i] is lltype.Float:
+                    c_source.append('    fprintf(stderr, "x%d = %%f\\n", 
x%d);' % (i, i))
+                elif ARGTYPES[i] is lltype.Signed:
+                    c_source.append('    fprintf(stderr, "x%d = %%ld\\n", 
x%d);' % (i, i))
+                elif ARGTYPES[i] is rffi.UINT:
+                    c_source.append('    fprintf(stderr, "x%d = %%u\\n", 
x%d);' % (i, i))                    
+            for i in range(len(ARGTYPES)):
                 c_source.append('    argcopy_%s_x%d = x%d;' % (fn_name, i, i))
             c_source.append('}')
             c_source.append('RPY_EXPORTED void *%s(void)' % fn_name)
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