Author: Maciej Fijalkowski <[email protected]>
Branch: arm64
Changeset: r96872:73a46425439f
Date: 2019-06-27 15:59 +0000
http://bitbucket.org/pypy/pypy/changeset/73a46425439f/
Log: translation fixes
diff --git a/rpython/jit/backend/aarch64/TODO b/rpython/jit/backend/aarch64/TODO
--- a/rpython/jit/backend/aarch64/TODO
+++ b/rpython/jit/backend/aarch64/TODO
@@ -2,4 +2,4 @@
* int_cmp - IMM
* guard_nonnull_class - think about a better way
* cond_call and following guard_exception
-* we have a 3-register gap on JITFRAME
+* stack check
diff --git a/rpython/jit/backend/aarch64/codebuilder.py
b/rpython/jit/backend/aarch64/codebuilder.py
--- a/rpython/jit/backend/aarch64/codebuilder.py
+++ b/rpython/jit/backend/aarch64/codebuilder.py
@@ -427,8 +427,7 @@
assert ofs & 0x3 == 0
assert -1 << 21 < ofs < 1 << 21
imm = ofs >> 2
- if imm < 0:
- xxx
+ assert imm > 0 # we seem not to need the - jump
self.write32((base << 24) | (imm << 5) | cond)
def B(self, target):
diff --git a/rpython/jit/backend/aarch64/opassembler.py
b/rpython/jit/backend/aarch64/opassembler.py
--- a/rpython/jit/backend/aarch64/opassembler.py
+++ b/rpython/jit/backend/aarch64/opassembler.py
@@ -80,9 +80,11 @@
def emit_comp_op_int_add_ovf(self, op, arglocs):
self.int_add_impl(op, arglocs, True)
+ return 0
def emit_comp_op_int_sub_ovf(self, op, arglocs):
self.int_sub_impl(op, arglocs, True)
+ return 0
def emit_op_int_mul(self, op, arglocs):
reg1, reg2, res = arglocs
@@ -93,6 +95,7 @@
self.mc.SMULH_rr(r.ip0.value, reg1.value, reg2.value)
self.mc.MUL_rr(res.value, reg1.value, reg2.value)
self.mc.CMP_rr_shifted(r.ip0.value, res.value, 63)
+ return 0
def emit_op_int_and(self, op, arglocs):
l0, l1, res = arglocs
@@ -131,13 +134,6 @@
def emit_float_comp_op(self, op, l0, l1):
self.mc.FCMP_dd(l0.value, l1.value)
- emit_comp_op_float_lt = emit_float_comp_op
- emit_comp_op_float_lt = emit_float_comp_op
- emit_comp_op_float_lt = emit_float_comp_op
- emit_comp_op_float_lt = emit_float_comp_op
- emit_comp_op_float_lt = emit_float_comp_op
- emit_comp_op_float_lt = emit_float_comp_op
-
emit_comp_op_float_lt = gen_float_comp_op_cc('float_lt', c.VFP_LT)
emit_comp_op_float_le = gen_float_comp_op_cc('float_le', c.VFP_LE)
emit_comp_op_float_eq = gen_float_comp_op_cc('float_eq', c.EQ)
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