https://github.com/python/cpython/commit/c6661bdc7d6042003fdb932f5be172d89d1e4a42
commit: c6661bdc7d6042003fdb932f5be172d89d1e4a42
branch: main
author: Zanie Blue <[email protected]>
committer: corona10 <[email protected]>
date: 2026-10-22T22:02:49Z
summary:
gh-124948: Reject explicit Cortex-A53 workaround flags with BOLT (gh-160337)
files:
A Misc/NEWS.d/next/Build/2026-10-22-18-57-02.gh-issue-128884.3zR5Yp.rst
M Doc/using/configure.rst
M configure
M configure.ac
diff --git a/Doc/using/configure.rst b/Doc/using/configure.rst
index e77bbd33d80fc1..33d3a25df6de49 100644
--- a/Doc/using/configure.rst
+++ b/Doc/using/configure.rst
@@ -763,6 +763,24 @@ also be used to improve performance.
BOLT versions before LLVM 16 are known to crash BOLT under some scenarios.
Use of LLVM 16 or newer for BOLT optimization is strongly encouraged.
+ BOLT does not preserve protection against Cortex-A53 erratum 843419.
Binaries
+ processed by BOLT must not run on processors affected by this erratum,
+ including during the build. On AArch64, :program:`configure` reports an
error
+ if build flags explicitly request the workaround. Recent BOLT versions
reject
+ workaround veneers by default during the build, including when the
workaround
+ is enabled by compiler defaults.
+
+ If none of the generated executables or shared libraries will run on
affected
+ processors, disable the workaround explicitly. For GCC toolchains that
enable
+ it by default, pass ``-mno-fix-cortex-a53-843419`` through
+ :envvar:`LDFLAGS_NODIST`::
+
+ LDFLAGS_NODIST="-mno-fix-cortex-a53-843419" ./configure --enable-bolt
+
+ Remove any explicit ``-mfix-cortex-a53-843419`` or
+ ``-Wl,--fix-cortex-a53-843419`` flags from the build configuration. The GCC
+ option does not override explicit linker flags.
+
The :envvar:`!BOLT_INSTRUMENT_FLAGS` and :envvar:`!BOLT_APPLY_FLAGS`
:program:`configure` variables can be defined to override the default set of
arguments for :program:`llvm-bolt` to instrument and apply BOLT data to
diff --git
a/Misc/NEWS.d/next/Build/2026-10-22-18-57-02.gh-issue-128884.3zR5Yp.rst
b/Misc/NEWS.d/next/Build/2026-10-22-18-57-02.gh-issue-128884.3zR5Yp.rst
new file mode 100644
index 00000000000000..8d0227cf684144
--- /dev/null
+++ b/Misc/NEWS.d/next/Build/2026-10-22-18-57-02.gh-issue-128884.3zR5Yp.rst
@@ -0,0 +1,3 @@
+Report a configuration error when ``--enable-bolt`` is used with build flags
+that explicitly request the Cortex-A53 erratum 843419 workaround. Document how
to
+disable the workaround for builds that will not run on affected processors.
diff --git a/configure b/configure
index c5b45796563411..44216096e083de 100755
--- a/configure
+++ b/configure
@@ -9496,6 +9496,33 @@ esac
fi
+ # BOLT rejects binaries with Cortex-A53 erratum 843419 workaround veneers,
+ # see https://github.com/llvm/llvm-project/pull/187955
+ # Check explicit flags here to provide a friendlier error. Recent BOLT
+ # versions reject workaround veneers by default, including those
+ # from compiler defaults, so we do not perform exhaustive detection.
+ case $host_cpu in #(
+ aarch64*) :
+
+ case "$CC $CFLAGS $CPPFLAGS $CFLAGS_NODIST $LDFLAGS $LDFLAGS_NODIST $LIBS"
in #(
+ *-mfix-cortex-a53-843419*|*--fix-cortex-a53-843419*) :
+
+ as_fn_error $? "--enable-bolt is incompatible with the Cortex-A53
erratum 843419 workaround.
+BOLT does not preserve protection against this erratum. Its output must not run
+on affected Cortex-A53 processors, including during the build.
+If the generated binaries will never run on affected processors, disable the
+workaround explicitly. With GCC, configure with
+LDFLAGS_NODIST=\"-mno-fix-cortex-a53-843419\". Also remove any explicit
+-mfix-cortex-a53-843419 or -Wl,--fix-cortex-a53-843419 flags." "$LINENO" 5
+ ;; #(
+ *) :
+ ;;
+esac
+ ;; #(
+ *) :
+ ;;
+esac
+
# These flags are required for bolt to work:
LDFLAGS_NODIST="$LDFLAGS_NODIST -Wl,--emit-relocs"
diff --git a/configure.ac b/configure.ac
index 8c7d3b4e617fe9..5a548485e85116 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2212,6 +2212,24 @@ if test "$Py_BOLT" = 'true' ; then
CFLAGS_NODIST="$CFLAGS_NODIST -fno-reorder-blocks-and-partition"
])
+ # BOLT rejects binaries with Cortex-A53 erratum 843419 workaround veneers,
+ # see https://github.com/llvm/llvm-project/pull/187955
+ # Check explicit flags here to provide a friendlier error. Recent BOLT
+ # versions reject workaround veneers by default, including those
+ # from compiler defaults, so we do not perform exhaustive detection.
+ AS_CASE([$host_cpu], [aarch64*], [
+ AS_CASE(["$CC $CFLAGS $CPPFLAGS $CFLAGS_NODIST $LDFLAGS $LDFLAGS_NODIST
$LIBS"],
+ [*-mfix-cortex-a53-843419*|*--fix-cortex-a53-843419*], [
+ AC_MSG_ERROR([--enable-bolt is incompatible with the Cortex-A53 erratum
843419 workaround.
+BOLT does not preserve protection against this erratum. Its output must not run
+on affected Cortex-A53 processors, including during the build.
+If the generated binaries will never run on affected processors, disable the
+workaround explicitly. With GCC, configure with
+LDFLAGS_NODIST="-mno-fix-cortex-a53-843419". Also remove any explicit
+-mfix-cortex-a53-843419 or -Wl,--fix-cortex-a53-843419 flags.])
+ ])
+ ])
+
# These flags are required for bolt to work:
LDFLAGS_NODIST="$LDFLAGS_NODIST -Wl,--emit-relocs"
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