On Fri, 30 Mar 2018 15:28:47 +0900 INADA Naoki <songofaca...@gmail.com> wrote: > Hi, > > As far as I know, most amd64 and arm64 systems use only 48bit address spaces. > (except [1]) > > [1] > https://software.intel.com/sites/default/files/managed/2b/80/5-level_paging_white_paper.pdf > > It means there are some chance to compact some data structures.
As that paper shows, effective virtual address width tends to increase over time to accomodate growing needs. Bigger systems like IBM POWER sytems may already have larger virtual address spaces. So we can't safely assume that bits 48-63 are available for us. Another issue is the cost of the associated bit-twiddling. It will all depend how often it needs to be done. Note that pointers can be "negative", i.e. some of them will have all 1s in their upper bits, and you need to reproduce that when reconstituting the original pointer. A safer alternative is to use the *lower* bits of pointers. The bottom 3 bits are always available for storing ancillary information, since typically all heap-allocated data will be at least 8-bytes aligned (probably 16-bytes aligned on 64-bit processes). However, you also get less bits :-) Regards Antoine. _______________________________________________ Python-Dev mailing list Python-Dev@python.org https://mail.python.org/mailman/listinfo/python-dev Unsubscribe: https://mail.python.org/mailman/options/python-dev/archive%40mail-archive.com
