Martin Devera <[EMAIL PROTECTED]> wrote: [snip] > Even if you can do fast atomic inc/dec, it forces cacheline with > refcounter to ping-pong between caches of referencing cpus (for read only > class dicts for example) so that you can probably never get good SMP > scalability.
That's ok. Why? Because according to Guido, the GIL isn't going away: http://mail.python.org/pipermail/python-3000/2006-April/001072.html ... so ruminations about refcounting, GC, etc., at least with regards to removing the GIL towards some sort of "free threading" Python, are likely to go nowhere. Unless someone is able to translate the codebase into using such methods, show how it is not (significantly) more difficult to program extensions for, show a mild to moderate slowdown on single processors, and prove actual speedup on multiple processors. But even then it will be a difficult sell, as it would require possibly radical rewrites for all of the hundreds or thousands of CPython extensions currently being developed and maintained. - Josiah _______________________________________________ Python-Dev mailing list Python-Dev@python.org http://mail.python.org/mailman/listinfo/python-dev Unsubscribe: http://mail.python.org/mailman/options/python-dev/archive%40mail-archive.com
