Am 14.03.2013 03:05, schrieb Trent Nelson: > Just posted the slides for those that didn't have the benefit of > attending the language summit today: > > > https://speakerdeck.com/trent/parallelizing-the-python-interpreter-an-alternate-approach-to-async
Wow, neat! Your idea with Py_PXCTC is ingenious. As far as I remember the FS and GS segment registers are used by most modern operating systems on x86 and x86_64 platforms nowadays to distinguish threads. TLS is implemented with FS and GS registers. I guess the __read[gf]sdword() intrinsics do exactly the same. Reading registers is super fast and should have a negligible effect on code. ARM CPUs don't have segment registers because they have a simpler addressing model. The register CP15 came up after a couple of Google searches. IMHO you should target x86, x86_64, ARMv6 and ARMv7. ARMv7 is going to be more important than x86 in the future. We are going to see more ARM based servers. Christian _______________________________________________ Python-Dev mailing list Python-Dev@python.org http://mail.python.org/mailman/listinfo/python-dev Unsubscribe: http://mail.python.org/mailman/options/python-dev/archive%40mail-archive.com
