On Sun, 4 Jun 2017 09:46:10 -0500 Tim Peters <tim.pet...@gmail.com> wrote: > [Tim] > >> A virtual address space span of a terabyte could hold 1M pools, so > >> would "only" need a 1M/8 = 128KB bit vector. That's minor compared to > >> a terabyte (one bit per megabyte). > > [Antoine] > > The virtual address space currently supported by x86-64 is 48 bits > > wide (spanning an address space of 2**48 bytes, that is 256 TB), so you > > would need a 2**(48-20) bits vector, i.e. 256 Mbits or 32 MB. > > > > Note Intel has plans to extend the virtual address space to 2**57 bytes: > > https://www.phoronix.com/scan.php?page=news_item&px=Intel-5-Level-Paging > > Fill in the blanks ;-) There's only a need for the bit vector to > cover the range of addresses _actually returned_ by the system for > arenas allocated so far (we're only trying to identify the memory > obmalloc _does_ control) . I didn't spell that out, but it was > implicit in glosses like "(or if the bit address is out of the > vector's domain)". That is, it's up to the bit vector implementation > to intelligently represent what's almost always going to be a > relatively tiny slice of a theoretically massive address space.
True. That works if the operating system doesn't go too wild in address space randomization, though ;-) Regards Antoine. _______________________________________________ Python-Dev mailing list Python-Dev@python.org https://mail.python.org/mailman/listinfo/python-dev Unsubscribe: https://mail.python.org/mailman/options/python-dev/archive%40mail-archive.com
