In article <5337b4e4$0$29994$c3e8da3$54964...@news.astraweb.com>,
 Steven D'Aprano <steve+comp.lang.pyt...@pearwood.info> wrote:

> I think Johannes got it right: boolean logic is easier to reason about 
> when there is a minimum of "not"s.

I used to do a lot of digital logic design.  In certain logic families, 
it's easier to build a NAND gate than an AND gate (and similarly, NOR is 
easier than OR).  This leads to lots of inverted logic.  Adding to the 
confusion, many designs would use "active low" logic, which means a 1 
was represented by a low voltage, and a 0 by a high voltage.  So, you 
quickly end up with gibberish like, "not active low clear nand not 
active low enable clock".  I'm glad I don't do that stuff any more.
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