From: Bin Meng <[email protected]>
Per the "Physical Layer Specification Version 8.00" chapter 7.5.1,
"Command/Response", there is a minimum 8 clock cycles (Ncr) before
the card response shows up on the data out line. However current
implementation jumps directly to the sending response state after
all 6 bytes command is received, which is a spec violation.
Add a new state PREP_RESP in the ssi-sd state machine to handle it.
Fixes: 775616c3ae8c ("Partial SD card SPI mode support")
Signed-off-by: Bin Meng <[email protected]>
Tested-by: Pragnesh Patel <[email protected]>
Reviewed-by: Pragnesh Patel <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-Id: <[email protected]>
[PMD: Change VMState version id 2 -> 3]
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
hw/sd/ssi-sd.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c
index 9a75e0095cf..d97646795a2 100644
--- a/hw/sd/ssi-sd.c
+++ b/hw/sd/ssi-sd.c
@@ -36,6 +36,7 @@ do { fprintf(stderr, "ssi_sd: error: " fmt , ##
__VA_ARGS__);} while (0)
typedef enum {
SSI_SD_CMD = 0,
SSI_SD_CMDARG,
+ SSI_SD_PREP_RESP,
SSI_SD_RESPONSE,
SSI_SD_DATA_START,
SSI_SD_DATA_READ,
@@ -163,12 +164,16 @@ static uint32_t ssi_sd_transfer(SSIPeripheral *dev,
uint32_t val)
s->response[1] = status;
DPRINTF("Card status 0x%02x\n", status);
}
- s->mode = SSI_SD_RESPONSE;
+ s->mode = SSI_SD_PREP_RESP;
s->response_pos = 0;
} else {
s->cmdarg[s->arglen++] = val;
}
return 0xff;
+ case SSI_SD_PREP_RESP:
+ DPRINTF("Prepare card response (Ncr)\n");
+ s->mode = SSI_SD_RESPONSE;
+ return 0xff;
case SSI_SD_RESPONSE:
if (s->stopping) {
s->stopping = 0;
@@ -224,8 +229,8 @@ static int ssi_sd_post_load(void *opaque, int version_id)
static const VMStateDescription vmstate_ssi_sd = {
.name = "ssi_sd",
- .version_id = 2,
- .minimum_version_id = 2,
+ .version_id = 3,
+ .minimum_version_id = 3,
.post_load = ssi_sd_post_load,
.fields = (VMStateField []) {
VMSTATE_UINT32(mode, ssi_sd_state),
--
2.26.2
