Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 8cc357b5a8dfba8ed11d1ce376afbc4ea35677a9 https://github.com/qemu/qemu/commit/8cc357b5a8dfba8ed11d1ce376afbc4ea35677a9 Author: Daniel P. Berrange <berra...@redhat.com> Date: 2018-02-13 (Tue, 13 Feb 2018)
Changed paths: M Makefile M rules.mak Log Message: ----------- Revert "build-sys: silence make by default or V=0" This reverts commit 42a77f1ce4934b243df003f95bda88530631387a. The primary intention of this change was to silence messages like make[1]: '/home/berrange/src/virt/qemu/capstone/libcapstone.a' is up to date. which we get when calling make recursively with explicit targets. The problem is that this change affected every make target, not merely the targets that triggered these "is up to date" messages. As a result any targets that were not invoking commands via "$(call quiet-command ...)" suddenly become silent. This is particularly bad for "make install" which now appears todo nothing. Rather than go through every make rule and try to identify places where we now need to explicitly print a message to show work taking place, just revert the change. To address the original problem of silencing "is up to date" messages, we simply add --quiet to the SUBDIR_MAKEVARS variable, so it only affects us on recursive make calls. Signed-off-by: Daniel P. Berrange <berra...@redhat.com> Message-Id: <20180123164718.12714-2-berra...@redhat.com> Tested-by: Eric Blake <ebl...@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lur...@redhat.com> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: 7b40951922616628d028622fed5aaeec63275201 https://github.com/qemu/qemu/commit/7b40951922616628d028622fed5aaeec63275201 Author: Daniel P. Berrange <berra...@redhat.com> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M Makefile Log Message: ----------- make: fix help message reference to bogus V=0 variable The make rules for building QEMU are mostly silent by default. They can be made verbose by setting the variable V=1. The default state does not however correspond to a V=0 setting - $(V) must be undefined / empty to get the default quiet build. Signed-off-by: Daniel P. Berrange <berra...@redhat.com> Message-Id: <20180123164718.12714-3-berra...@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lur...@redhat.com> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: 7a5235c9e679c58be41c7f0d2f4092ded8bd01f2 https://github.com/qemu/qemu/commit/7a5235c9e679c58be41c7f0d2f4092ded8bd01f2 Author: Yu Ning <yu.n...@intel.com> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M include/sysemu/hax.h M target/i386/hax-all.c M target/i386/hax-darwin.c M target/i386/hax-darwin.h M target/i386/hax-i386.h M target/i386/hax-interface.h M target/i386/hax-mem.c M target/i386/hax-windows.c M target/i386/hax-windows.h Log Message: ----------- hax: Support guest RAM sizes of 4GB or more Since HAX_VM_IOCTL_ALLOC_RAM takes a 32-bit size, it cannot handle RAM blocks of 4GB or larger, which is why HAXM can only run guests with less than 4GB of RAM. Solve this problem by utilizing the new HAXM API, HAX_VM_IOCTL_ADD_RAMBLOCK, which takes a 64-bit size, to register RAM blocks with the HAXM kernel module. The new API is first added in HAXM 7.0.0, and its availablility and be confirmed by the presence of the HAX_CAP_64BIT_RAMBLOCK capability flag. When the guest RAM size reaches 7GB, QEMU will ask HAXM to set up a memory mapping that covers a 4GB region, which will fail, because HAX_VM_IOCTL_SET_RAM also takes a 32-bit size. Work around this limitation by splitting the large mapping into small ones and calling HAX_VM_IOCTL_SET_RAM multiple times. Bug: https://bugs.launchpad.net/qemu/+bug/1735576 Signed-off-by: Yu Ning <yu.n...@intel.com> Message-Id: <1515752555-12784-1-git-send-email-yu.n...@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: d18957dbcc837d0420a2789da29e8dae976b9f1d https://github.com/qemu/qemu/commit/d18957dbcc837d0420a2789da29e8dae976b9f1d Author: Pavel Pisa <p...@cmp.felk.cvut.cz> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M default-configs/pci.mak M hw/Makefile.objs A include/net/can_emu.h A include/net/can_host.h M net/Makefile.objs A net/can/Makefile.objs A net/can/can_core.c A net/can/can_host.c Log Message: ----------- net/can: simple messages transport implementation for QEMU The CanBusState state structure is created for each emulated CAN channel. Individual clients/emulated CAN interfaces or host interface connection registers to the bus by CanBusClientState structure. The CAN core is prepared to support connection to the real host CAN bus network. The commit with such support for Linux SocketCAN follows. Implementation is as simple as possible. There is no state to be migrated, and messages prioritization and queuing are not considered for now. But it is intended to be extended when need arises. Development repository and more documentation at https://gitlab.fel.cvut.cz/canbus/qemu-canbus The work is based on Jin Yang GSoC 2013 work funded by Google and mentored in frame of RTEMS project GSoC slot donated to QEMU. Rewritten for QEMU-2.0+ versions and architecture cleanup by Pavel Pisa (Czech Technical University in Prague). Signed-off-by: Pavel Pisa <p...@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: ea15ea8a7c67b1277d6817fb247b1427e0d293f3 https://github.com/qemu/qemu/commit/ea15ea8a7c67b1277d6817fb247b1427e0d293f3 Author: Pavel Pisa <p...@cmp.felk.cvut.cz> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M net/can/Makefile.objs A net/can/can_socketcan.c Log Message: ----------- net/can: support for connecting to Linux host SocketCAN interface. Connection to the real host CAN bus network through SocketCAN network interface is available only for Linux host system. Mechanism is generic, support for another CAN API and operating systems can be implemented in future. Signed-off-by: Pavel Pisa <p...@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: 733210e75465aecf99cac641e6408cee6ace9037 https://github.com/qemu/qemu/commit/733210e75465aecf99cac641e6408cee6ace9037 Author: Pavel Pisa <p...@cmp.felk.cvut.cz> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M default-configs/pci.mak M hw/Makefile.objs M hw/net/Makefile.objs A hw/net/can/Makefile.objs A hw/net/can/can_sja1000.c A hw/net/can/can_sja1000.h Log Message: ----------- hw/net/can: SJA1000 chip register level emulation for QEMU The core SJA1000 support is independent of following patches which map SJA1000 chip to PCI boards. The work is based on Jin Yang GSoC 2013 work funded by Google and mentored in frame of RTEMS project GSoC slot donated to QEMU. Rewritten for QEMU-2.0+ versions and architecture cleanup by Pavel Pisa (Czech Technical University in Prague). Signed-off-by: Pavel Pisa <p...@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: 321af2f5b8285d547468c505fc8ed66b9c1b1907 https://github.com/qemu/qemu/commit/321af2f5b8285d547468c505fc8ed66b9c1b1907 Author: Pavel Pisa <p...@cmp.felk.cvut.cz> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M default-configs/pci.mak M hw/net/can/Makefile.objs A hw/net/can/can_kvaser_pci.c Log Message: ----------- hw/net/can: Kvaser PCI CAN-S (single SJA1000 channel) emulation Signed-off-by: Pavel Pisa <p...@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: cfae1ba3b68566fe781c9468eca9f77bc301c174 https://github.com/qemu/qemu/commit/cfae1ba3b68566fe781c9468eca9f77bc301c174 Author: Deniz Eren <deniz.e...@icloud.com> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/net/can/Makefile.objs A hw/net/can/can_pcm3680_pci.c Log Message: ----------- hw/net/can: PCM-3680I PCI (dual SJA1000 channel) emulation Signed-off-by: Deniz Eren <deniz.e...@icloud.com> Signed-off-by: Pavel Pisa <p...@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: db3e63798d035fca693457db3138c93f8fabbb6a https://github.com/qemu/qemu/commit/db3e63798d035fca693457db3138c93f8fabbb6a Author: Deniz Eren <deniz.e...@icloud.com> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/net/can/Makefile.objs A hw/net/can/can_mioe3680_pci.c Log Message: ----------- hw/net/can: MIOe-3680 PCI (dual SJA1000 channel) emulation Signed-off-by: Deniz Eren <deniz.e...@icloud.com> Signed-off-by: Pavel Pisa <p...@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: e73e09481c6fc87a67fc3b3183d40aed6bb586ff https://github.com/qemu/qemu/commit/e73e09481c6fc87a67fc3b3183d40aed6bb586ff Author: Pavel Pisa <p...@cmp.felk.cvut.cz> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: A docs/can.txt Log Message: ----------- net/can: documentation Signed-off-by: Pavel Pisa <p...@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: a62ed5d10600762eef20e2d925ce9e3adf56b9f7 https://github.com/qemu/qemu/commit/a62ed5d10600762eef20e2d925ce9e3adf56b9f7 Author: Paolo Bonzini <pbonz...@redhat.com> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/net/can/can_kvaser_pci.c M hw/net/can/can_sja1000.c Log Message: ----------- hw/net/can: interrupt cleanup Define two functions to update the interrupt state, and call them on loadvm. This removes the need to migrate the state as part of vmstate_kvaser_pci. Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: 1de19951f11e5b9935b2dccffd962382429a5e29 https://github.com/qemu/qemu/commit/1de19951f11e5b9935b2dccffd962382429a5e29 Author: Marc-André Lureau <marcandre.lur...@redhat.com> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M configure Log Message: ----------- build-sys: remove useless extra*flags variables Only EXTRA_LDFLAGS seems to be used during configure Xen checks. Signed-off-by: Marc-André Lureau <marcandre.lur...@redhat.com> Message-Id: <20180208162343.30809-1-marcandre.lur...@redhat.com> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: 218bb57dd79d6843e0592c30a82ea8c1fddc74a5 https://github.com/qemu/qemu/commit/218bb57dd79d6843e0592c30a82ea8c1fddc74a5 Author: Marc-André Lureau <marcandre.lur...@redhat.com> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M configure Log Message: ----------- build-sys: check static linking of UBSAN Signed-off-by: Marc-André Lureau <marcandre.lur...@redhat.com> Message-Id: <20180208162343.30809-2-marcandre.lur...@redhat.com> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: ab958e3864c70bf45fe4a688ba231250d39339cf https://github.com/qemu/qemu/commit/ab958e3864c70bf45fe4a688ba231250d39339cf Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/sdhci.c Log Message: ----------- sdhci: use error_propagate(local_err) in realize() avoid the "errp && *errp" pattern (not recommended in "qapi/error.h" comments). Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-2-f4...@amsat.org> Commit: 8640cc11a8b619da79fe354ee54a7ebcc207088f https://github.com/qemu/qemu/commit/8640cc11a8b619da79fe354ee54a7ebcc207088f Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M tests/Makefile.include A tests/sdhci-test.c Log Message: ----------- sdhci: add qtest to check the SD capabilities register The PCI model is tested with the pc/x86_64 machine, the SysBus model with the smdkc210/arm machine. Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Paolo Bonzini <pbonz...@redhat.com> Message-Id: <20180208164818.7961-3-f4...@amsat.org> Commit: 556f9aca7f3d716185ebb05527ac3efb9709d4a5 https://github.com/qemu/qemu/commit/556f9aca7f3d716185ebb05527ac3efb9709d4a5 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M tests/sdhci-test.c Log Message: ----------- sdhci: add check_capab_readonly() qtest Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Stefan Hajnoczi <stefa...@redhat.com> Message-Id: <20180208164818.7961-4-f4...@amsat.org> Commit: 0c78f51eb4ac0bfaca7278f16d918052805d2ed8 https://github.com/qemu/qemu/commit/0c78f51eb4ac0bfaca7278f16d918052805d2ed8 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M tests/sdhci-test.c Log Message: ----------- sdhci: add a check_capab_baseclock() qtest Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Stefan Hajnoczi <stefa...@redhat.com> Message-Id: <20180208164818.7961-5-f4...@amsat.org> Commit: bc13038f3a2c7c9ddc1b33757fdcb152d1fbd5dc https://github.com/qemu/qemu/commit/bc13038f3a2c7c9ddc1b33757fdcb152d1fbd5dc Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M tests/sdhci-test.c Log Message: ----------- sdhci: add a check_capab_sdma() qtest Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Stefan Hajnoczi <stefa...@redhat.com> Message-Id: <20180208164818.7961-6-f4...@amsat.org> Commit: efe9d52405846f7ad023e7ec5933dcc2568f5a42 https://github.com/qemu/qemu/commit/efe9d52405846f7ad023e7ec5933dcc2568f5a42 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M tests/sdhci-test.c Log Message: ----------- sdhci: add qtest to check the SD Spec version Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Stefan Hajnoczi <stefa...@redhat.com> Message-Id: <20180208164818.7961-7-f4...@amsat.org> Commit: aceb5b064cbc44443c257e88364740e9db11549c https://github.com/qemu/qemu/commit/aceb5b064cbc44443c257e88364740e9db11549c Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/sdhci-internal.h M hw/sd/sdhci.c M include/hw/sd/sdhci.h Log Message: ----------- sdhci: add a 'spec_version property' (default to v2) Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-8-f4...@amsat.org> Commit: aa164fbff3fef9e2815d5782dd063a3d32153af6 https://github.com/qemu/qemu/commit/aa164fbff3fef9e2815d5782dd063a3d32153af6 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/sdhci.c Log Message: ----------- sdhci: use a numeric value for the default CAPAB register using many #defines is not portable when scaling to different HCI. Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-9-f4...@amsat.org> Commit: 09b738ff653665dfcc646f6293998b490ca7f54e https://github.com/qemu/qemu/commit/09b738ff653665dfcc646f6293998b490ca7f54e Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/sdhci-internal.h M hw/sd/sdhci.c Log Message: ----------- sdhci: simplify sdhci_get_fifolen() Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-10-f4...@amsat.org> Commit: 6ff37c3dfaf5859150bbd4d9669f48954101c13c https://github.com/qemu/qemu/commit/6ff37c3dfaf5859150bbd4d9669f48954101c13c Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/sdhci-internal.h M hw/sd/sdhci.c M hw/sd/trace-events Log Message: ----------- sdhci: check the Spec v1 capabilities correctness Incorrect value will throw an error. Note than Spec v2 is supported by default. Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-11-f4...@amsat.org> Commit: bf8ec38e17d27e7ebbfd31a3725a77209abe943d https://github.com/qemu/qemu/commit/bf8ec38e17d27e7ebbfd31a3725a77209abe943d Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/sdhci.c Log Message: ----------- sdhci: replace DMA magic value by BLOCK_SIZE_MASK Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-12-f4...@amsat.org> Commit: 04654b5a8c8ed5c2fcd77da0c555c936141ee125 https://github.com/qemu/qemu/commit/04654b5a8c8ed5c2fcd77da0c555c936141ee125 Author: Sai Pavan Boddu <saip...@xilinx.com> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/sdhci.c Log Message: ----------- sdhci: Fix 64-bit ADMA2 The 64-bit ADMA address is not converted to the cpu endianes correctly. This patch fixes the issue and uses a valid mask for the attribute data. Signed-off-by: Sai Pavan Boddu <saip...@xilinx.com> [AF: Re-write commit message] Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-13-f4...@amsat.org> Commit: 0540fba949c4d2ed833796a4a23becf5fcc93286 https://github.com/qemu/qemu/commit/0540fba949c4d2ed833796a4a23becf5fcc93286 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/sdhci-internal.h M hw/sd/sdhci.c Log Message: ----------- sdhci: check Spec v2 capabilities (DMA and 64-bit bus) Incorrect value will throw an error. Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-14-f4...@amsat.org> Commit: 3c675da5be8a49b5513495e32a702a1aec8e0064 https://github.com/qemu/qemu/commit/3c675da5be8a49b5513495e32a702a1aec8e0064 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/arm/exynos4210.c Log Message: ----------- hw/arm/exynos4210: access the 64-bit capareg with qdev_prop_set_uint64() We only set a 32-bit value, but this is a good practice in case this code is used as reference. (missed in 5efc9016e52) Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-15-f4...@amsat.org> Commit: 2edb443471bcbb8527518a91d3b8594f1b7cce50 https://github.com/qemu/qemu/commit/2edb443471bcbb8527518a91d3b8594f1b7cce50 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/arm/exynos4210.c Log Message: ----------- hw/arm/exynos4210: add a comment about a very similar SDHCI (Spec. v2) Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Acked-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-16-f4...@amsat.org> Commit: 27a49d3be627807734f0e2f3e30315cb5235ea76 https://github.com/qemu/qemu/commit/27a49d3be627807734f0e2f3e30315cb5235ea76 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/arm/xilinx_zynq.c M tests/sdhci-test.c Log Message: ----------- hw/arm/xilinx_zynq: fix the capabilities register to match the datasheet checking Xilinx datasheet "UG585" (v1.12.1) Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-17-f4...@amsat.org> Commit: 4d67852d9c97b51359b90aa58333e774c98f1a8c https://github.com/qemu/qemu/commit/4d67852d9c97b51359b90aa58333e774c98f1a8c Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/sdhci-internal.h M hw/sd/sdhci.c Log Message: ----------- sdhci: add support for v3 capabilities Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-18-f4...@amsat.org> Commit: 06c5120b094700d21d36eb5db00f7bb60ea65868 https://github.com/qemu/qemu/commit/06c5120b094700d21d36eb5db00f7bb60ea65868 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/sdhci.c M include/hw/sd/sdhci.h Log Message: ----------- sdhci: rename the hostctl1 register As per the Spec v3.00 Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-19-f4...@amsat.org> Commit: ea55a221bfc04bde7c7874ecd98881e09763a192 https://github.com/qemu/qemu/commit/ea55a221bfc04bde7c7874ecd98881e09763a192 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/sdhci-internal.h M hw/sd/sdhci.c M include/hw/sd/sdhci.h Log Message: ----------- sdhci: implement the Host Control 2 register (tuning sequence) [based on a patch from Alistair Francis <alistair.fran...@xilinx.com> from qemu/xilinx tag xilinx-v2015.2] Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-20-f4...@amsat.org> Commit: 238cd93567253e0126fbd0c0c3bc75aa43e46a5d https://github.com/qemu/qemu/commit/238cd93567253e0126fbd0c0c3bc75aa43e46a5d Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/core.c M hw/sd/trace-events Log Message: ----------- sdbus: add trace events Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-21-f4...@amsat.org> Commit: 0034ebe6ee3151e5c54fd13c6f441429bd2cdadf https://github.com/qemu/qemu/commit/0034ebe6ee3151e5c54fd13c6f441429bd2cdadf Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/core.c M hw/sd/sd.c M hw/sd/sdhci.c M hw/sd/trace-events M include/hw/sd/sd.h M include/hw/sd/sdhci.h Log Message: ----------- sdhci: implement UHS-I voltage switch [based on a patch from Alistair Francis <alistair.fran...@xilinx.com> from qemu/xilinx tag xilinx-v2015.2] Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-22-f4...@amsat.org> Commit: da34692234a03b6ffabd0b5b7864b423ac8eca56 https://github.com/qemu/qemu/commit/da34692234a03b6ffabd0b5b7864b423ac8eca56 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/core.c M hw/sd/sd.c M hw/sd/sdhci-internal.h M hw/sd/sdhci.c M hw/sd/trace-events M include/hw/sd/sd.h Log Message: ----------- sdhci: implement CMD/DAT[] fields in the Present State register [based on a patch from Alistair Francis <alistair.fran...@xilinx.com> from qemu/xilinx tag xilinx-v2015.2] Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-23-f4...@amsat.org> Commit: ed6c5e93bbdc1ece5305c62016e9bddde4141154 https://github.com/qemu/qemu/commit/ed6c5e93bbdc1ece5305c62016e9bddde4141154 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/arm/bcm2835_peripherals.c Log Message: ----------- hw/arm/bcm2835_peripherals: implement SDHCI Spec v3 Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-24-f4...@amsat.org> Commit: e4fcd07c2022e6745741cf568984b6f5d231d848 https://github.com/qemu/qemu/commit/e4fcd07c2022e6745741cf568984b6f5d231d848 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/arm/bcm2835_peripherals.c Log Message: ----------- hw/arm/bcm2835_peripherals: change maximum block size to 1kB following the datasheet. Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Acked-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-25-f4...@amsat.org> Commit: 7f072603e5c1f28ac0592ca947b653267aaa2943 https://github.com/qemu/qemu/commit/7f072603e5c1f28ac0592ca947b653267aaa2943 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/arm/fsl-imx6.c Log Message: ----------- hw/arm/fsl-imx6: implement SDHCI Spec. v3 Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Acked-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-26-f4...@amsat.org> Commit: b630d3d42aa1cc65f78822ce67519d7e96ff704c https://github.com/qemu/qemu/commit/b630d3d42aa1cc65f78822ce67519d7e96ff704c Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/arm/xlnx-zynqmp.c Log Message: ----------- hw/arm/xilinx_zynqmp: fix the capabilities/spec version to match the datasheet checking Xilinx datasheet "UG1085" (v1.7) Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-27-f4...@amsat.org> Commit: a01c65541f766da61622d1f465bc90626b673768 https://github.com/qemu/qemu/commit/a01c65541f766da61622d1f465bc90626b673768 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/arm/xlnx-zynqmp.c Log Message: ----------- hw/arm/xilinx_zynqmp: enable the UHS-I mode see the Xilinx datasheet "UG1085" (v1.7) Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-28-f4...@amsat.org> Commit: 09b9428db496fe9b497d27081f2904e76dc65277 https://github.com/qemu/qemu/commit/09b9428db496fe9b497d27081f2904e76dc65277 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M tests/Makefile.include M tests/sdhci-test.c Log Message: ----------- sdhci: check Spec v3 capabilities qtest Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Acked-by: Alistair Francis <alistair.fran...@xilinx.com> Message-Id: <20180208164818.7961-29-f4...@amsat.org> Commit: f18e6d50e2b42410699ccffcf42d5c420bc5302b https://github.com/qemu/qemu/commit/f18e6d50e2b42410699ccffcf42d5c420bc5302b Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M tests/sdhci-test.c Log Message: ----------- sdhci: add a check_capab_v3() qtest Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Stefan Hajnoczi <stefa...@redhat.com> Message-Id: <20180208164818.7961-30-f4...@amsat.org> Commit: 1e23b63f022ae79d7a5c535fe549127ad52d5ba6 https://github.com/qemu/qemu/commit/1e23b63f022ae79d7a5c535fe549127ad52d5ba6 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/sd/sdhci-internal.h M hw/sd/sdhci.c Log Message: ----------- sdhci: add Spec v4.2 register definitions Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Message-Id: <20180208164818.7961-31-f4...@amsat.org> Commit: f7189ac8e6bcc34a7957b1dae7ea3fbcb138fc50 https://github.com/qemu/qemu/commit/f7189ac8e6bcc34a7957b1dae7ea3fbcb138fc50 Author: Paolo Bonzini <pbonz...@redhat.com> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/display/g364fb.c Log Message: ----------- g364fb: switch to using DirtyBitmapSnapshot This removes the last user of memory_region_test_and_clear_dirty outside memory.c. Tested-by: Hervé Poussineau <hpous...@reactos.org> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: 77302fb5df05ffca9f41b5b54e3b67c601719d57 https://github.com/qemu/qemu/commit/77302fb5df05ffca9f41b5b54e3b67c601719d57 Author: Paolo Bonzini <pbonz...@redhat.com> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M include/exec/memory.h M memory.c Log Message: ----------- memory: remove memory_region_test_and_clear_dirty It is unused after g364fb has been converted to use DirtyBitmapSnapshot. Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: 0fe1eca7dcef4b0432c858d0eea32a84f014ddc5 https://github.com/qemu/qemu/commit/0fe1eca7dcef4b0432c858d0eea32a84f014ddc5 Author: Paolo Bonzini <pbonz...@redhat.com> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M hw/display/cg3.c M hw/display/exynos4210_fimd.c M hw/display/framebuffer.c M hw/display/g364fb.c M hw/display/sm501.c M hw/display/tcx.c M hw/display/vga.c M include/exec/memory.h M memory.c Log Message: ----------- memory: hide memory_region_sync_dirty_bitmap behind DirtyBitmapSnapshot Simplify the users of memory_region_snapshot_and_clear_dirty, so that they do not have to call memory_region_sync_dirty_bitmap explicitly. Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: 3ebb1817b387804bd5e21f49ca538db74b09a2b0 https://github.com/qemu/qemu/commit/3ebb1817b387804bd5e21f49ca538db74b09a2b0 Author: Paolo Bonzini <pbonz...@redhat.com> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M memory.c Log Message: ----------- memory: unify loops to sync dirty log bitmap Now that memory_region_sync_dirty_bitmap is NULL, we can unify its loop with memory_global_dirty_log_sync's. The only difference is that memory_region_sync_dirty_bitmap will no longer call log_sync on FlatRanges that do have a zero dirty_log_mask, but this is okay because video memory is always registered with the dirty page logging mechanism. Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Commit: 7524a39d8c7c9ff54504cfeb784909e4f49d6f30 https://github.com/qemu/qemu/commit/7524a39d8c7c9ff54504cfeb784909e4f49d6f30 Author: Philippe Mathieu-Daudé <f4...@amsat.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M .travis.yml Log Message: ----------- travis: use libgcc-4.8-dev (libgcc-6-dev is not available on Ubuntu 14.04) Travis image is based on Ubuntu Trusty (14.04), since d83414e1fd1 we get: $ sudo -E \ apt-get -yq --no-install-suggests --no-install-recommends --force-yes \ install \ libaio-dev libattr1-dev libbrlapi-dev libcap-ng-dev libgcc-6-dev \ libgnutls-dev libgtk-3-dev libiscsi-dev liblttng-ust-dev \ libncurses5-dev libnfs-dev libnss3-dev libpixman-1-dev libpng12-dev \ librados-dev libsdl1.2-dev libseccomp-dev libspice-protocol-dev \ libspice-server-dev libssh2-1-dev liburcu-dev libusb-1.0-0-dev \ libvte-2.90-dev sparse uuid-dev Reading package lists... Building dependency tree... Reading state information... E: Unable to locate package libgcc-6-dev Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Commit: bec9c64ef7be8063f1192608b83877bc5c9ea217 https://github.com/qemu/qemu/commit/bec9c64ef7be8063f1192608b83877bc5c9ea217 Author: Peter Maydell <peter.mayd...@linaro.org> Date: 2018-02-13 (Tue, 13 Feb 2018) Changed paths: M .travis.yml M Makefile M configure M default-configs/pci.mak A docs/can.txt M hw/arm/bcm2835_peripherals.c M hw/arm/exynos4210.c M hw/arm/fsl-imx6.c M hw/arm/xilinx_zynq.c M hw/arm/xlnx-zynqmp.c M hw/display/cg3.c M hw/display/exynos4210_fimd.c M hw/display/framebuffer.c M hw/display/g364fb.c M hw/display/sm501.c M hw/display/tcx.c M hw/display/vga.c M hw/net/Makefile.objs A hw/net/can/Makefile.objs A hw/net/can/can_kvaser_pci.c A hw/net/can/can_mioe3680_pci.c A hw/net/can/can_pcm3680_pci.c A hw/net/can/can_sja1000.c A hw/net/can/can_sja1000.h M hw/sd/core.c M hw/sd/sd.c M hw/sd/sdhci-internal.h M hw/sd/sdhci.c M hw/sd/trace-events M include/exec/memory.h M include/hw/sd/sd.h M include/hw/sd/sdhci.h A include/net/can_emu.h A include/net/can_host.h M include/sysemu/hax.h M memory.c M net/Makefile.objs A net/can/Makefile.objs A net/can/can_core.c A net/can/can_host.c A net/can/can_socketcan.c M rules.mak M target/i386/hax-all.c M target/i386/hax-darwin.c M target/i386/hax-darwin.h M target/i386/hax-i386.h M target/i386/hax-interface.h M target/i386/hax-mem.c M target/i386/hax-windows.c M target/i386/hax-windows.h M tests/Makefile.include A tests/sdhci-test.c Log Message: ----------- Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging * CAN bus (will be under network maintainner) * scsi-block opblockers (myself) * Dirty log bitmap cleanup (myself) * SDHCI improvements and tests (Philippe) * HAX support for larger guest sizese (Yu Ning) # gpg: Signature made Tue 13 Feb 2018 15:37:14 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonz...@gnu.org>" # gpg: aka "Paolo Bonzini <pbonz...@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (48 commits) travis: use libgcc-4.8-dev (libgcc-6-dev is not available on Ubuntu 14.04) memory: unify loops to sync dirty log bitmap memory: hide memory_region_sync_dirty_bitmap behind DirtyBitmapSnapshot memory: remove memory_region_test_and_clear_dirty g364fb: switch to using DirtyBitmapSnapshot sdhci: add Spec v4.2 register definitions sdhci: add a check_capab_v3() qtest sdhci: check Spec v3 capabilities qtest hw/arm/xilinx_zynqmp: enable the UHS-I mode hw/arm/xilinx_zynqmp: fix the capabilities/spec version to match the datasheet hw/arm/fsl-imx6: implement SDHCI Spec. v3 hw/arm/bcm2835_peripherals: change maximum block size to 1kB hw/arm/bcm2835_peripherals: implement SDHCI Spec v3 sdhci: implement CMD/DAT[] fields in the Present State register sdhci: implement UHS-I voltage switch sdbus: add trace events sdhci: implement the Host Control 2 register (tuning sequence) sdhci: rename the hostctl1 register sdhci: add support for v3 capabilities hw/arm/xilinx_zynq: fix the capabilities register to match the datasheet ... Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> Compare: https://github.com/qemu/qemu/compare/b734ed9de10d...bec9c64ef7be