Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: b67be03e3ac9d20a258f24dcaf1b61c91c1306f5
https://github.com/qemu/qemu/commit/b67be03e3ac9d20a258f24dcaf1b61c91c1306f5
Author: Anton Johansson <a...@rev.ng>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M accel/kvm/kvm-all.c
M include/sysemu/kvm.h
Log Message:
-----------
accel/kvm: Widen pc/saved_insn for kvm_sw_breakpoint
Widens the pc and saved_insn fields of kvm_sw_breakpoint from
target_ulong to vaddr. The pc argument of kvm_find_sw_breakpoint is also
widened to match.
Signed-off-by: Anton Johansson <a...@rev.ng>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20230807155706.9580-2-a...@rev.ng>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: fcfe761680e2a94f64a20914c0df9462ec31b113
https://github.com/qemu/qemu/commit/fcfe761680e2a94f64a20914c0df9462ec31b113
Author: Anton Johansson <a...@rev.ng>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M accel/hvf/hvf-accel-ops.c
M accel/hvf/hvf-all.c
M include/sysemu/hvf.h
Log Message:
-----------
accel/hvf: Widen pc/saved_insn for hvf_sw_breakpoint
Widens the pc and saved_insn fields of hvf_sw_breakpoint from
target_ulong to vaddr. Other hvf_* functions accessing hvf_sw_breakpoint
are also widened to match.
Signed-off-by: Anton Johansson <a...@rev.ng>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20230807155706.9580-3-a...@rev.ng>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: b8a6eb1862a96b1c51518df2562804a39eccd97b
https://github.com/qemu/qemu/commit/b8a6eb1862a96b1c51518df2562804a39eccd97b
Author: Anton Johansson <a...@rev.ng>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M include/sysemu/kvm.h
M target/arm/kvm64.c
M target/i386/kvm/kvm.c
M target/ppc/kvm.c
M target/s390x/kvm/kvm.c
Log Message:
-----------
sysemu/kvm: Use vaddr for kvm_arch_[insert|remove]_hw_breakpoint
Changes the signature of the target-defined functions for
inserting/removing kvm hw breakpoints. The address and length arguments
are now of vaddr type, which both matches the type used internally in
accel/kvm/kvm-all.c and makes the api target-agnostic.
Signed-off-by: Anton Johansson <a...@rev.ng>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20230807155706.9580-4-a...@rev.ng>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: d447a624d0cffb28836e776687a861cd27d06d2f
https://github.com/qemu/qemu/commit/d447a624d0cffb28836e776687a861cd27d06d2f
Author: Anton Johansson <a...@rev.ng>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M include/sysemu/hvf.h
M target/arm/hvf/hvf.c
M target/i386/hvf/hvf.c
Log Message:
-----------
sysemu/hvf: Use vaddr for hvf_arch_[insert|remove]_hw_breakpoint
Changes the signature of the target-defined functions for
inserting/removing hvf hw breakpoints. The address and length arguments
are now of vaddr type, which both matches the type used internally in
accel/hvf/hvf-all.c and makes the api target-agnostic.
Signed-off-by: Anton Johansson <a...@rev.ng>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20230807155706.9580-5-a...@rev.ng>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 022b9bcedef9b6123d287345e424cc8fc8475dca
https://github.com/qemu/qemu/commit/022b9bcedef9b6123d287345e424cc8fc8475dca
Author: Anton Johansson <a...@rev.ng>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M accel/tcg/atomic_template.h
M accel/tcg/cputlb.c
M include/exec/cpu_ldst.h
M target/riscv/vector_helper.c
M target/rx/op_helper.c
Log Message:
-----------
include/exec: Replace target_ulong with abi_ptr in cpu_[st|ld]*()
Changes the address type of the guest memory read/write functions from
target_ulong to abi_ptr. (abi_ptr is currently typedef'd to target_ulong
but that will change in a following commit.) This will reduce the
coupling between accel/ and target/.
Note: Function pointers that point to cpu_[st|ld]*() in target/riscv and
target/rx are also updated in this commit.
Signed-off-by: Anton Johansson <a...@rev.ng>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20230807155706.9580-6-a...@rev.ng>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: fc15bfb6a6bda8d4d01f1383579d385acae17c0f
https://github.com/qemu/qemu/commit/fc15bfb6a6bda8d4d01f1383579d385acae17c0f
Author: Anton Johansson <a...@rev.ng>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M include/exec/cpu_ldst.h
Log Message:
-----------
include/exec: typedef abi_ptr to vaddr in softmmu
In system mode, abi_ptr is primarily used for representing addresses
when accessing guest memory with cpu_[st|ld]*(). Widening it from
target_ulong to vaddr reduces the target dependence of these functions
and is step towards building accel/ once for system mode.
Signed-off-by: Anton Johansson <a...@rev.ng>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20230807155706.9580-7-a...@rev.ng>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: c78edb563942ce80c9c6c03b07397725b006b625
https://github.com/qemu/qemu/commit/c78edb563942ce80c9c6c03b07397725b006b625
Author: Anton Johansson <a...@rev.ng>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M include/exec/cpu-all.h
Log Message:
-----------
include/exec: Widen tlb_hit/tlb_hit_page()
tlb_addr is changed from target_ulong to uint64_t to match the type of
a CPUTLBEntry value, and the addressed is changed to vaddr.
Signed-off-by: Anton Johansson <a...@rev.ng>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20230807155706.9580-8-a...@rev.ng>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: d712b116385e262329e323d02de79998f18191a8
https://github.com/qemu/qemu/commit/d712b116385e262329e323d02de79998f18191a8
Author: Anton Johansson <a...@rev.ng>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Widen address arg in tlb_compare_set()
Signed-off-by: Anton Johansson <a...@rev.ng>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20230807155706.9580-9-a...@rev.ng>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: e79f81421b78c4329d54a895b96d74a88d055968
https://github.com/qemu/qemu/commit/e79f81421b78c4329d54a895b96d74a88d055968
Author: Anton Johansson <a...@rev.ng>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Update run_on_cpu_data static assert
As we are now using vaddr for representing guest addresses, update the
static assert to check that vaddr fits in the run_on_cpu_data union.
Signed-off-by: Anton Johansson <a...@rev.ng>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20230807155706.9580-10-a...@rev.ng>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 64919f710f3547e59e56089e91e4cbe0c623a6af
https://github.com/qemu/qemu/commit/64919f710f3547e59e56089e91e4cbe0c623a6af
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M target/m68k/translate.c
Log Message:
-----------
target/m68k: Use tcg_gen_deposit_i32 in gen_partset_reg
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 36df88c0405aafa747d3ee04c3d96f81827841f7
https://github.com/qemu/qemu/commit/36df88c0405aafa747d3ee04c3d96f81827841f7
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/i386/tcg-target-con-set.h
M tcg/i386/tcg-target-con-str.h
M tcg/i386/tcg-target.c.inc
M tcg/i386/tcg-target.h
Log Message:
-----------
tcg/i386: Drop BYTEH deposits for 64-bit
It is more useful to allow low-part deposits into all registers
than to restrict allocation for high-byte deposits.
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 8f7a840d7df92ecbf78802e54eee52e82aa55383
https://github.com/qemu/qemu/commit/8f7a840d7df92ecbf78802e54eee52e82aa55383
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/optimize.c
Log Message:
-----------
tcg: Fold deposit with zero to and
Inserting a zero into a value, or inserting a value
into zero at offset 0 may be implemented with AND.
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 73f97f0aa34c1da9946b399ae92e7b65c51627b1
https://github.com/qemu/qemu/commit/73f97f0aa34c1da9946b399ae92e7b65c51627b1
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/i386/tcg-target-con-set.h
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Allow immediate as input to deposit_*
We can use MOVB and MOVW with an immediate just as easily
as with a register input.
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: bb9d7ee83e7279d71dae5dfba4d149abbf2c3b59
https://github.com/qemu/qemu/commit/bb9d7ee83e7279d71dae5dfba4d149abbf2c3b59
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M docs/devel/tcg-ops.rst
Log Message:
-----------
docs/devel/tcg-ops: Bury mentions of trunc_shr_i64_i32()
Commit 609ad70562 ("tcg: Split trunc_shr_i32 opcode into
extr[lh]_i64_i32") remove trunc_shr_i64_i32(). Update the
backend documentation.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20230822162847.71206-1-phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 13d885b0ad4ada4d216b0341de5ae4a9ce3f5abb
https://github.com/qemu/qemu/commit/13d885b0ad4ada4d216b0341de5ae4a9ce3f5abb
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M include/tcg/tcg-opc.h
M include/tcg/tcg.h
M tcg/aarch64/tcg-target.h
M tcg/i386/tcg-target.h
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.h
M tcg/s390x/tcg-target.h
M tcg/sparc64/tcg-target.h
M tcg/tcg-op.c
M tcg/tcg.c
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32
Replace the separate defines with TCG_TARGET_HAS_extr_i64_i32,
so that the two parts of backend-specific type changing cannot
be out of sync.
Reported-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-id: <20230822175127.1173698-1-richard.hender...@linaro.org>
Commit: 3635502dd00bcfee3a6ab790d950c2fc4ace607b
https://github.com/qemu/qemu/commit/3635502dd00bcfee3a6ab790d950c2fc4ace607b
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M docs/devel/tcg-ops.rst
M include/tcg/tcg-op-common.h
M include/tcg/tcg-op.h
M include/tcg/tcg-opc.h
M include/tcg/tcg.h
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.h
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/optimize.c
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.h
M tcg/s390x/tcg-target.h
M tcg/sparc64/tcg-target.h
M tcg/tcg-op.c
M tcg/tcg.c
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Introduce negsetcond opcodes
Introduce a new opcode for negative setcond.
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 4a8838705660a72bcb35ef6ba271769fb1c8ab02
https://github.com/qemu/qemu/commit/4a8838705660a72bcb35ef6ba271769fb1c8ab02
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/tcg-op-gvec.c
M tcg/tcg-op.c
Log Message:
-----------
tcg: Use tcg_gen_negsetcond_*
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: d55a3211e24d7b918b1b0bcb8a89aafb524c2b14
https://github.com/qemu/qemu/commit/d55a3211e24d7b918b1b0bcb8a89aafb524c2b14
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M target/alpha/translate.c
Log Message:
-----------
target/alpha: Use tcg_gen_movcond_i64 in gen_fold_mzero
The setcond + neg + and sequence is a complex method of
performing a conditional move.
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: a1264259902039ad4427f6c912d453f7d3763059
https://github.com/qemu/qemu/commit/a1264259902039ad4427f6c912d453f7d3763059
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M target/arm/tcg/translate-a64.c
M target/arm/tcg/translate.c
Log Message:
-----------
target/arm: Use tcg_gen_negsetcond_*
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 27f9af76e11441c498aedf34cb08d0a148fc71f1
https://github.com/qemu/qemu/commit/27f9af76e11441c498aedf34cb08d0a148fc71f1
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M target/m68k/translate.c
Log Message:
-----------
target/m68k: Use tcg_gen_negsetcond_*
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: cfe158875b81df65771d8bfabf6f9a18a9c4307a
https://github.com/qemu/qemu/commit/cfe158875b81df65771d8bfabf6f9a18a9c4307a
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M target/openrisc/translate.c
Log Message:
-----------
target/openrisc: Use tcg_gen_negsetcond_*
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 253d110dba77769e1f2919d066c53dfd65942dc3
https://github.com/qemu/qemu/commit/253d110dba77769e1f2919d066c53dfd65942dc3
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M target/ppc/translate/fixedpoint-impl.c.inc
M target/ppc/translate/vmx-impl.c.inc
Log Message:
-----------
target/ppc: Use tcg_gen_negsetcond_*
Tested-by: Nicholas Piggin <npig...@gmail.com>
Reviewed-by: Nicholas Piggin <npig...@gmail.com>
Reviewed-by: Daniel Henrique Barboza <danielhb...@gmail.com>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: e3ebbade58aae114c0d61a7365ea54b36f07f2fb
https://github.com/qemu/qemu/commit/e3ebbade58aae114c0d61a7365ea54b36f07f2fb
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Use tcg_gen_movcond_i64 in gen_edge
The setcond + neg + or sequence is a complex method of
performing a conditional move.
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: b0a433be48c120fdc2be676216a240a316f3613e
https://github.com/qemu/qemu/commit/b0a433be48c120fdc2be676216a240a316f3613e
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M target/tricore/translate.c
Log Message:
-----------
target/tricore: Replace gen_cond_w with tcg_gen_negsetcond_tl
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Bastian Koppelmann <kbast...@mail.uni-paderborn.de>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: cba10bb3c8875f428821608f9dfb860a97a63aa1
https://github.com/qemu/qemu/commit/cba10bb3c8875f428821608f9dfb860a97a63aa1
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
M tcg/ppc/tcg-target.h
Log Message:
-----------
tcg/ppc: Implement negsetcond_*
In the general case we simply negate. However with isel we
may load -1 instead of 1 with no extra effort.
Consolidate EQ0 and NE0 logic. Replace the NE0 zero-extension
with inversion+negation of EQ0, which is never worse and may
eliminate one insn. Provide a special case for -EQ0.
Reviewed-by: Daniel Henrique Barboza <danielhb...@gmail.com>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 72fa954a6321734b2d7875af7741e23e84601a5b
https://github.com/qemu/qemu/commit/72fa954a6321734b2d7875af7741e23e84601a5b
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use the Set Boolean Extension
The SETBC family of instructions requires exactly two insns for
all comparisions, saving 0-3 insns per (neg)setcond.
Tested-by: Nicholas Piggin <npig...@gmail.com>
Reviewed-by: Daniel Henrique Barboza <danielhb...@gmail.com>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: f58a7dea0f0652779e1525f072ef45bf99dbfd72
https://github.com/qemu/qemu/commit/f58a7dea0f0652779e1525f072ef45bf99dbfd72
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/aarch64/tcg-target.h
Log Message:
-----------
tcg/aarch64: Implement negsetcond_*
Trivial, as aarch64 has an instruction for this: CSETM.
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: fe06b8973385c9421b2988239cadb9d091cdc628
https://github.com/qemu/qemu/commit/fe06b8973385c9421b2988239cadb9d091cdc628
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/arm/tcg-target.c.inc
M tcg/arm/tcg-target.h
Log Message:
-----------
tcg/arm: Implement negsetcond_i32
Trivial, as we simply need to load a different constant
in the conditional move.
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 41e4c0a9ad2b10fc14896447361225b410eb112e
https://github.com/qemu/qemu/commit/41e4c0a9ad2b10fc14896447361225b410eb112e
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/riscv/tcg-target.c.inc
M tcg/riscv/tcg-target.h
Log Message:
-----------
tcg/riscv: Implement negsetcond_*
Reviewed-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 128c7d51942fed5bf09ad835ef2dd9b57946ada3
https://github.com/qemu/qemu/commit/128c7d51942fed5bf09ad835ef2dd9b57946ada3
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/s390x/tcg-target.c.inc
M tcg/s390x/tcg-target.h
Log Message:
-----------
tcg/s390x: Implement negsetcond_*
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: a0fdd7c91c220ea9240643b155f9f5bdc4a2e2a1
https://github.com/qemu/qemu/commit/a0fdd7c91c220ea9240643b155f9f5bdc4a2e2a1
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/sparc64/tcg-target.c.inc
M tcg/sparc64/tcg-target.h
Log Message:
-----------
tcg/sparc64: Implement negsetcond_*
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: c359ce756db4fd8ba27a390780e3013b479ae537
https://github.com/qemu/qemu/commit/c359ce756db4fd8ba27a390780e3013b479ae537
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Merge tcg_out_brcond{32,64}
Pass a rexw parameter instead of duplicating the functions.
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 7ba99a1c762d46e08a5adf68f71f9d4ab621a094
https://github.com/qemu/qemu/commit/7ba99a1c762d46e08a5adf68f71f9d4ab621a094
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Merge tcg_out_setcond{32,64}
Pass a rexw parameter instead of duplicating the functions.
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 78ddf0dc75229865ba637cfffd53cc605cc33ca1
https://github.com/qemu/qemu/commit/78ddf0dc75229865ba637cfffd53cc605cc33ca1
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Merge tcg_out_movcond{32,64}
Pass a rexw parameter instead of duplicating the functions.
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 6950f68b62e4913513a40b574de0219b7ae15b9f
https://github.com/qemu/qemu/commit/6950f68b62e4913513a40b574de0219b7ae15b9f
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Use CMP+SBB in tcg_out_setcond
Use the carry bit to optimize some forms of setcond.
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 96658acafd9ade24d00526e46cc073ed8fcf2111
https://github.com/qemu/qemu/commit/96658acafd9ade24d00526e46cc073ed8fcf2111
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Clear dest first in tcg_out_setcond if possible
Using XOR first is both smaller and more efficient,
though cannot be applied if it clobbers an input.
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: e91f015b62d72158c4f69a5b1cbf87fba4599ba1
https://github.com/qemu/qemu/commit/e91f015b62d72158c4f69a5b1cbf87fba4599ba1
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Use shift in tcg_out_setcond
For LT/GE vs zero, shift down the sign bit.
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 95bf306e3a058a38f5adb27be2ac598134b159d9
https://github.com/qemu/qemu/commit/95bf306e3a058a38f5adb27be2ac598134b159d9
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/i386/tcg-target.c.inc
M tcg/i386/tcg-target.h
Log Message:
-----------
tcg/i386: Implement negsetcond_*
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 4de5a76a923e1afab28bfbf9d19b67368bf98fb8
https://github.com/qemu/qemu/commit/4de5a76a923e1afab28bfbf9d19b67368bf98fb8
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/tcg-op.c
Log Message:
-----------
tcg/tcg-op: Document bswap16_i32() byte pattern
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-Id: <20230823145542.79633-2-phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 8b078800ab23c38e07a11dffbd88a988a6633152
https://github.com/qemu/qemu/commit/8b078800ab23c38e07a11dffbd88a988a6633152
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/tcg-op.c
Log Message:
-----------
tcg/tcg-op: Document bswap16_i64() byte pattern
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-Id: <20230823145542.79633-3-phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 9296455697dbc423f0ca201f75d4e44bfcb68a5b
https://github.com/qemu/qemu/commit/9296455697dbc423f0ca201f75d4e44bfcb68a5b
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/tcg-op.c
Log Message:
-----------
tcg/tcg-op: Document bswap32_i32() byte pattern
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-Id: <20230823145542.79633-4-phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 9c40621584622078dcf47bb9add9a05925105130
https://github.com/qemu/qemu/commit/9c40621584622078dcf47bb9add9a05925105130
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/tcg-op.c
Log Message:
-----------
tcg/tcg-op: Document bswap32_i64() byte pattern
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-Id: <20230823145542.79633-5-phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 95180e750b16ab21556b1073c3051a848911093a
https://github.com/qemu/qemu/commit/95180e750b16ab21556b1073c3051a848911093a
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/tcg-op.c
Log Message:
-----------
tcg/tcg-op: Document bswap64_i64() byte pattern
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20230823145542.79633-6-phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: b8976aa5fe65e335af2eb5243a67d3b7fcd5442e
https://github.com/qemu/qemu/commit/b8976aa5fe65e335af2eb5243a67d3b7fcd5442e
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/tcg-op.c
Log Message:
-----------
tcg/tcg-op: Document hswap_i32/64() byte pattern
Document hswap_i32() and hswap_i64(), added in commit
46be8425ff ("tcg: Implement tcg_gen_{h,w}swap_{i32,i64}").
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-Id: <20230823145542.79633-7-phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: ad262fb56bd8b04a992f20c598286587080eb3c7
https://github.com/qemu/qemu/commit/ad262fb56bd8b04a992f20c598286587080eb3c7
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/tcg-op.c
Log Message:
-----------
tcg/tcg-op: Document wswap_i64() byte pattern
Document wswap_i64(), added in commit 46be8425ff
("tcg: Implement tcg_gen_{h,w}swap_{i32,i64}").
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-Id: <20230823145542.79633-8-phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 277561638f482f54f6e18f8206429cdc62294179
https://github.com/qemu/qemu/commit/277561638f482f54f6e18f8206429cdc62294179
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M target/cris/translate.c
Log Message:
-----------
target/cris: Fix a typo in gen_swapr()
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-Id: <20230823145542.79633-9-phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: b08caa6d50d45debfb67822a3c667e12a29ba437
https://github.com/qemu/qemu/commit/b08caa6d50d45debfb67822a3c667e12a29ba437
Author: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M docs/devel/tcg-ops.rst
Log Message:
-----------
docs/devel/tcg-ops: fix missing newlines in "Host vector operations"
This unintentionally causes the mov_vec, ld_vec and st_vec operations
to appear on the same line.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-Id: <20230823141740.35974-1-mark.cave-ayl...@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 4daad8d9d6b9d426beb8ce505d2164ba36ea3168
https://github.com/qemu/qemu/commit/4daad8d9d6b9d426beb8ce505d2164ba36ea3168
Author: Michael Tokarev <m...@tls.msk.ru>
Date: 2023-08-24 (Thu, 24 Aug 2023)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
Log Message:
-----------
tcg: spelling fixes
Acked-by: Alex Bennée <alex.ben...@linaro.org>
Signed-off-by: Michael Tokarev <m...@tls.msk.ru>
Message-Id: <20230823065335.1919380-4-...@tls.msk.ru>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: c400b6ed877213ad3d87d0e27f260401a9194c7c
https://github.com/qemu/qemu/commit/c400b6ed877213ad3d87d0e27f260401a9194c7c
Author: Helge Deller <del...@gmx.de>
Date: 2023-08-25 (Fri, 25 Aug 2023)
Changed paths:
M target/hppa/cpu.h
Log Message:
-----------
target/hppa: Add missing PL1 and PL2 privilege levels
The hppa CPU has 4 privilege levels (0-3).
Mention the missing PL1 and PL2 levels, although the Linux kernel
uses only 0 (KERNEL) and 3 (USER). Not sure about HP-UX.
Signed-off-by: Helge Deller <del...@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Commit: c01e5dfb9a5b7a4c044e5da8840b6bc1175e5839
https://github.com/qemu/qemu/commit/c01e5dfb9a5b7a4c044e5da8840b6bc1175e5839
Author: Helge Deller <del...@gmx.de>
Date: 2023-08-25 (Fri, 25 Aug 2023)
Changed paths:
M target/hppa/cpu.h
M target/hppa/translate.c
Log Message:
-----------
target/hppa: Add privilege to MMU index conversion helpers
Add two macros which convert privilege level to/from MMU index:
- PRIV_TO_MMU_IDX(priv)
returns the MMU index for the given privilege level
- MMU_IDX_TO_PRIV(mmu_idx)
returns the corresponding privilege level for this MMU index
The introduction of those macros make the code easier to read and
will help to improve performance in follow-up patch.
Signed-off-by: Helge Deller <del...@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Commit: 88b7ad10dd7cecfb5977f99175fe62ac2c511290
https://github.com/qemu/qemu/commit/88b7ad10dd7cecfb5977f99175fe62ac2c511290
Author: Helge Deller <del...@gmx.de>
Date: 2023-08-25 (Fri, 25 Aug 2023)
Changed paths:
M target/hppa/cpu.h
M target/hppa/helper.c
M target/hppa/mem_helper.c
Log Message:
-----------
target/hppa: Do not use hardcoded value for tlb_flush_*()
Avoid using hardcoded values when calling the tlb_flush*() functions.
Instead, define and use HPPA_MMU_FLUSH_MASK (keeping the current
behavior, which doesn't flush the physical address MMU).
Signed-off-by: Helge Deller <del...@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Commit: 3d066afc68d469b2c7cbabf62d32421eef478a66
https://github.com/qemu/qemu/commit/3d066afc68d469b2c7cbabf62d32421eef478a66
Author: Helge Deller <del...@gmx.de>
Date: 2023-08-25 (Fri, 25 Aug 2023)
Changed paths:
M target/hppa/mem_helper.c
Log Message:
-----------
target/hppa: Use privilege helper in hppa_get_physical_address()
Convert hppa_get_physical_address() to use the privilege helper macro.
Signed-off-by: Helge Deller <del...@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Commit: 2ad04500543094bc83f5f13dbb099000f010e008
https://github.com/qemu/qemu/commit/2ad04500543094bc83f5f13dbb099000f010e008
Author: Helge Deller <del...@gmx.de>
Date: 2023-08-27 (Sun, 27 Aug 2023)
Changed paths:
M target/hppa/cpu.h
Log Message:
-----------
target/hppa: Switch to use MMU indices 11-15
The MMU indices 9-15 will use shorter assembler instructions
when run on a x86-64 host. So, switch over to those to get
smaller code and maybe minimally faster emulation.
Signed-off-by: Helge Deller <del...@gmx.de>
Commit: a3d3de8e1d4aff1343066e351020de9a6294c102
https://github.com/qemu/qemu/commit/a3d3de8e1d4aff1343066e351020de9a6294c102
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M configure
Log Message:
-----------
configure: fix and complete detection of tricore tools
The tricore tools are not detected when they are installed in
the host system, only if they are taken from an external
container. For this reason the build-tricore-softmmu job
was not running the TCG tests.
In addition the container provides all tools, not just as/ld/gcc,
so there is no need to special case tricore.
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: 87f77f58d897314f0726374ce8f9cdf44ccd9c5b
https://github.com/qemu/qemu/commit/87f77f58d897314f0726374ce8f9cdf44ccd9c5b
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M tests/docker/dockerfiles/debian-tricore-cross.docker
Log Message:
-----------
dockerfiles: bump tricore cross compiler container to Debian 11
With the release of version 12 on June 10, 2023, Debian 10 is
not supported anymore. Modify the cross compiler container to
build on a newer version.
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: 67b9a83daf384f3dc24e83f22da40e34da49021d
https://github.com/qemu/qemu/commit/67b9a83daf384f3dc24e83f22da40e34da49021d
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M python/scripts/mkvenv.py
Log Message:
-----------
python: mkvenv: tweak the matching of --diagnose to depspecs
Move the matching between the "absent" array and dep_specs[0] inside
the loop, preparing for the possibility of having multiple canaries
among the installed packages.
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: 0f1ec0705b92b79e5e5f69bed236639dae67d312
https://github.com/qemu/qemu/commit/0f1ec0705b92b79e5e5f69bed236639dae67d312
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M python/scripts/mkvenv.py
Log Message:
-----------
python: mkvenv: introduce TOML-like representation of dependencies
We would like to place all Python dependencies in the same file, so that
we can add more information without having long and complex command lines.
The plan is to have a TOML file with one entry per package, for example
[avocado]
avocado-framework = {
accepted = "(>=88.1, <93.0)",
installed = "88.1",
canary = "avocado"
}
Each TOML section will thus be a dictionary of dictionaries. Modify
mkvenv.py's workhorse function, _do_ensure, to already operate on such
a data structure. The "ensure" subcommand is modified to separate the
depspec into a name and a version part, and use the result (plus the
--diagnose argument) to build a dictionary for each command line argument.
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: 71ed611cd47d961e1897721d7d002ffb498221d4
https://github.com/qemu/qemu/commit/71ed611cd47d961e1897721d7d002ffb498221d4
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M python/scripts/mkvenv.py
M python/setup.cfg
A pythondeps.toml
Log Message:
-----------
python: mkvenv: add ensuregroup command
Introduce a new subcommand that retrieves the packages to be installed
from a TOML file. This allows being more flexible in using the system
version of a package, while at the same time using a known-good version
when installing the package. This is important for packages that
sometimes have backwards-incompatible changes or that depend on
specific versions of their dependencies.
Compared to JSON, TOML is more human readable and easier to edit. A
parser is available in 3.11 but also available as a small (12k) package
for older versions, tomli. While tomli is bundled with pip, this is only
true of recent versions of pip. Of all the supported OSes pretty much
only FreeBSD has a recent enough version of pip while staying on Python
<3.11. So we cannot use the same trick that is in place for distlib.
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: dcb8541b0b726e18af7bb32acc6eea383d3b75af
https://github.com/qemu/qemu/commit/dcb8541b0b726e18af7bb32acc6eea383d3b75af
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M tests/docker/dockerfiles/debian-amd64-cross.docker
M tests/docker/dockerfiles/debian-arm64-cross.docker
M tests/docker/dockerfiles/debian-armel-cross.docker
M tests/docker/dockerfiles/debian-armhf-cross.docker
M tests/docker/dockerfiles/debian-mips64el-cross.docker
M tests/docker/dockerfiles/debian-mipsel-cross.docker
M tests/docker/dockerfiles/debian-ppc64el-cross.docker
M tests/docker/dockerfiles/debian-riscv64-cross.docker
M tests/docker/dockerfiles/debian-s390x-cross.docker
M tests/docker/dockerfiles/fedora-win32-cross.docker
M tests/docker/dockerfiles/fedora-win64-cross.docker
M tests/docker/dockerfiles/opensuse-leap.docker
M tests/lcitool/libvirt-ci
M tests/lcitool/mappings.yml
M tests/lcitool/projects/qemu.yml
M tests/lcitool/targets/opensuse-leap-15.yml
Log Message:
-----------
lcitool: bump libvirt-ci submodule and regenerate
This brings in a newer version of the pipewire mapping, so rename it.
Python 3.9 and 3.10 do not seem to work in OpenSUSE LEAP 15.5 (weird,
because 3.9 persisted from 15.3 to 15.4) so bump the Python runtime
version to 3.11.
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: 7c3fb52bcdaef85b15a91b3ca4d1516f9d9b5402
https://github.com/qemu/qemu/commit/7c3fb52bcdaef85b15a91b3ca4d1516f9d9b5402
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M configure
Log Message:
-----------
configure: never use PyPI for Meson
Since there is a vendored copy, there is no point in choosing online
operation.
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: edc2107895007d621fe474d58bcb99036c8e55d2
https://github.com/qemu/qemu/commit/edc2107895007d621fe474d58bcb99036c8e55d2
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M configure
M python/scripts/vendor.py
A python/wheels/tomli-2.0.1-py3-none-any.whl
Log Message:
-----------
python: use vendored tomli
Debian only introduced tomli in the bookworm release. Use a
vendored wheel to avoid requiring a package that is only in
bullseye-backports and is also absent in Ubuntu 20.04.
While at it, fix an issue in the vendor.py scripts which does
not add a newline after each package and hash.
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: c853c4d08728f8e7fa6965e8508ed826b5461f04
https://github.com/qemu/qemu/commit/c853c4d08728f8e7fa6965e8508ed826b5461f04
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M configure
M pythondeps.toml
Log Message:
-----------
configure: switch to ensuregroup
Using the new ensuregroup command, the desired versions of meson and
sphinx can be placed in pythondeps.toml rather than configure.
The meson.install entry in pythondeps.toml matches the version that is
found in python/wheels. This ensures that mkvenv.py uses the bundled
wheel even if PyPI is enabled; thus not introducing warnings or errors
from versions that are more recent than the one used in CI.
The sphinx entries match what is shipped in Fedora 38. It's the
last release that has support for older versions of Python (sphinx 6.0
requires Python 3.8) and especially docutils (of which sphinx 6.0 requires
version 0.18). This is important because Ubuntu 20.04 has docutils 0.14
and Debian 11 has docutils 0.16.
"mkvenv.py ensure" is only used to bootstrap tomli.
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: c03f57fd5bf72588a05750f14202f63be7ddbd0c
https://github.com/qemu/qemu/commit/c03f57fd5bf72588a05750f14202f63be7ddbd0c
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M .gitlab-ci.d/buildtest.yml
M docs/devel/acpi-bits.rst
M docs/devel/testing.rst
M python/scripts/mkvenv.py
M pythondeps.toml
M scripts/ci/org.centos/stream/8/x86_64/test-avocado
M scripts/device-crash-test
M tests/Makefile.include
R tests/requirements.txt
M tests/vm/Makefile.include
Log Message:
-----------
Revert "tests: Use separate virtual environment for avocado"
This reverts commit e8e4298feadae7924cf7600bb3bcc5b0a8d7cbe9.
ensuregroup allows to specify both the acceptable versions of avocado,
and a locked version to be used when avocado is not installed as a system
pacakge. This lets us install avocado in pyvenv/ using "mkvenv.py" and
reuse the distro package on Fedora and CentOS Stream (the only distros
where it's available).
ensuregroup's usage of "(>=..., <=...)" constraints when evaluating
the distro package, and "==" constraints when installing it from PyPI,
makes it possible to avoid conflicts between the known-good version and
a package plugins included in the distro.
This is because package plugins have "==" constraints on the version
that is included in the distro, and, using "pip install avocado==88.1"
on a venv that includes system packages will result in an error:
avocado-framework-plugin-varianter-yaml-to-mux 98.0 requires
avocado-framework==98.0, but you have avocado-framework 88.1 which is
incompatible.
avocado-framework-plugin-result-html 98.0 requires avocado-framework==98.0,
but you have avocado-framework 88.1 which is incompatible.
But at the same time, if the venv does not include a system distribution
of avocado then we can install a known-good version and stick to LTS
releases.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1663
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: 7ace219303e28cc67852e1d193437cd1f367b5c8
https://github.com/qemu/qemu/commit/7ace219303e28cc67852e1d193437cd1f367b5c8
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M .gitlab-ci.d/cirrus/freebsd-13.vars
M .gitlab-ci.d/cirrus/macos-12.vars
M tests/docker/dockerfiles/centos8.docker
M tests/docker/dockerfiles/debian-all-test-cross.docker
M tests/docker/dockerfiles/debian-amd64-cross.docker
M tests/docker/dockerfiles/debian-amd64.docker
M tests/docker/dockerfiles/debian-arm64-cross.docker
M tests/docker/dockerfiles/debian-armel-cross.docker
M tests/docker/dockerfiles/debian-armhf-cross.docker
M tests/docker/dockerfiles/debian-hexagon-cross.docker
M tests/docker/dockerfiles/debian-mips64el-cross.docker
M tests/docker/dockerfiles/debian-mipsel-cross.docker
M tests/docker/dockerfiles/debian-ppc64el-cross.docker
M tests/docker/dockerfiles/debian-s390x-cross.docker
M tests/docker/dockerfiles/debian-tricore-cross.docker
M tests/docker/dockerfiles/fedora-i386-cross.docker
M tests/docker/dockerfiles/ubuntu2004.docker
M tests/docker/dockerfiles/ubuntu2204.docker
M tests/lcitool/mappings.yml
M tests/lcitool/projects/qemu.yml
M tests/vm/generated/freebsd.json
Log Message:
-----------
tests/docker: add python3-tomli dependency to containers
Instead of having CI pick tomli from the vendored wheel at configure
time, place it in the containers.
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: 33cc88261c352445d31599054653d759f20531c1
https://github.com/qemu/qemu/commit/33cc88261c352445d31599054653d759f20531c1
Author: Ake Koomsin <a...@igel.co.jp>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M target/i386/cpu.c
M target/i386/cpu.h
Log Message:
-----------
target/i386: add support for VMX_SECONDARY_EXEC_ENABLE_USER_WAIT_PAUSE
Current QEMU can expose waitpkg to guests when it is available. However,
VMX_SECONDARY_EXEC_ENABLE_USER_WAIT_PAUSE is still not recognized and
masked by QEMU. This can lead to an unexpected situation when a L1
hypervisor wants to expose waitpkg to a L2 guest. The L1 hypervisor can
assume that VMX_SECONDARY_EXEC_ENABLE_USER_WAIT_PAUSE exists as waitpkg is
available. The L1 hypervisor then can accidentally expose waitpkg to the
L2 guest. This will cause invalid opcode exception in the L2 guest when
it executes waitpkg related instructions.
This patch adds VMX_SECONDARY_EXEC_ENABLE_USER_WAIT_PAUSE support, and
sets up dependency between the bit and CPUID_7_0_ECX_WAITPKG. QEMU should
not expose waitpkg feature if VMX_SECONDARY_EXEC_ENABLE_USER_WAIT_PAUSE is
not available to avoid unexpected invalid opcode exception in L2 guests.
Signed-off-by: Ake Koomsin <a...@igel.co.jp>
Message-ID: <20230807093339.32091-2-...@igel.co.jp>
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: a04f33727cea092dc71be32745e8964f62fb8104
https://github.com/qemu/qemu/commit/a04f33727cea092dc71be32745e8964f62fb8104
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M configure
Log Message:
-----------
configure: fix container_hosts misspellings and duplications
container_hosts is matched against $cpu, so it must contain QEMU
canonical architecture names, not Debian architecture names.
Also do not set $container_hosts inside the loop, since it is
already set before.
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: 29a8238510df27080b0ffa92c58400412ce19daa
https://github.com/qemu/qemu/commit/29a8238510df27080b0ffa92c58400412ce19daa
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M configure
Log Message:
-----------
configure: remove unnecessary mkdir -p
It is already included in the symlink shell function.
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: 98bdf241be69135fef3db0b9a3cd43bed522e9cd
https://github.com/qemu/qemu/commit/98bdf241be69135fef3db0b9a3cd43bed522e9cd
Author: Stefan Hajnoczi <stefa...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M target/hppa/cpu.h
M target/hppa/helper.c
M target/hppa/mem_helper.c
M target/hppa/translate.c
Log Message:
-----------
Merge tag 'devel-hppa-priv-cleanup2-pull-request' of
https://github.com/hdeller/qemu-hppa into staging
target/hppa: Clean up conversion from/to MMU index and privilege level
Make the conversion between privilege level and QEMU MMU index
consistent, and afterwards switch to MMU indices 11-15.
Signed-off-by: Helge Deller <del...@gmx.de>
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* tag 'devel-hppa-priv-cleanup2-pull-request' of
https://github.com/hdeller/qemu-hppa:
target/hppa: Switch to use MMU indices 11-15
target/hppa: Use privilege helper in hppa_get_physical_address()
target/hppa: Do not use hardcoded value for tlb_flush_*()
target/hppa: Add privilege to MMU index conversion helpers
target/hppa: Add missing PL1 and PL2 privilege levels
Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com>
Commit: eaf760ac0d92c60b81c47acd9c051228442f33c6
https://github.com/qemu/qemu/commit/eaf760ac0d92c60b81c47acd9c051228442f33c6
Author: Stefan Hajnoczi <stefa...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M .gitlab-ci.d/buildtest.yml
M .gitlab-ci.d/cirrus/freebsd-13.vars
M .gitlab-ci.d/cirrus/macos-12.vars
M configure
M docs/devel/acpi-bits.rst
M docs/devel/testing.rst
M python/scripts/mkvenv.py
M python/scripts/vendor.py
M python/setup.cfg
A python/wheels/tomli-2.0.1-py3-none-any.whl
A pythondeps.toml
M scripts/ci/org.centos/stream/8/x86_64/test-avocado
M scripts/device-crash-test
M target/i386/cpu.c
M target/i386/cpu.h
M tests/Makefile.include
M tests/docker/dockerfiles/centos8.docker
M tests/docker/dockerfiles/debian-all-test-cross.docker
M tests/docker/dockerfiles/debian-amd64-cross.docker
M tests/docker/dockerfiles/debian-amd64.docker
M tests/docker/dockerfiles/debian-arm64-cross.docker
M tests/docker/dockerfiles/debian-armel-cross.docker
M tests/docker/dockerfiles/debian-armhf-cross.docker
M tests/docker/dockerfiles/debian-hexagon-cross.docker
M tests/docker/dockerfiles/debian-mips64el-cross.docker
M tests/docker/dockerfiles/debian-mipsel-cross.docker
M tests/docker/dockerfiles/debian-ppc64el-cross.docker
M tests/docker/dockerfiles/debian-riscv64-cross.docker
M tests/docker/dockerfiles/debian-s390x-cross.docker
M tests/docker/dockerfiles/debian-tricore-cross.docker
M tests/docker/dockerfiles/fedora-i386-cross.docker
M tests/docker/dockerfiles/fedora-win32-cross.docker
M tests/docker/dockerfiles/fedora-win64-cross.docker
M tests/docker/dockerfiles/opensuse-leap.docker
M tests/docker/dockerfiles/ubuntu2004.docker
M tests/docker/dockerfiles/ubuntu2204.docker
M tests/lcitool/libvirt-ci
M tests/lcitool/mappings.yml
M tests/lcitool/projects/qemu.yml
M tests/lcitool/targets/opensuse-leap-15.yml
R tests/requirements.txt
M tests/vm/Makefile.include
M tests/vm/generated/freebsd.json
Log Message:
-----------
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* separate accepted and auto-installed versions of Python dependencies
* bump tricore container to Debian 11
* small configure cleanups
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# gpg: Signature made Mon 28 Aug 2023 05:22:38 EDT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonz...@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonz...@gnu.org>" [full]
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
configure: remove unnecessary mkdir -p
configure: fix container_hosts misspellings and duplications
target/i386: add support for VMX_SECONDARY_EXEC_ENABLE_USER_WAIT_PAUSE
tests/docker: add python3-tomli dependency to containers
Revert "tests: Use separate virtual environment for avocado"
configure: switch to ensuregroup
python: use vendored tomli
configure: never use PyPI for Meson
lcitool: bump libvirt-ci submodule and regenerate
python: mkvenv: add ensuregroup command
python: mkvenv: introduce TOML-like representation of dependencies
python: mkvenv: tweak the matching of --diagnose to depspecs
dockerfiles: bump tricore cross compiler container to Debian 11
configure: fix and complete detection of tricore tools
Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com>
Commit: f5fe7c17ac4e309e47e78f0f9761aebc8d2f2c81
https://github.com/qemu/qemu/commit/f5fe7c17ac4e309e47e78f0f9761aebc8d2f2c81
Author: Stefan Hajnoczi <stefa...@redhat.com>
Date: 2023-08-28 (Mon, 28 Aug 2023)
Changed paths:
M accel/hvf/hvf-accel-ops.c
M accel/hvf/hvf-all.c
M accel/kvm/kvm-all.c
M accel/tcg/atomic_template.h
M accel/tcg/cputlb.c
M docs/devel/tcg-ops.rst
M include/exec/cpu-all.h
M include/exec/cpu_ldst.h
M include/sysemu/hvf.h
M include/sysemu/kvm.h
M include/tcg/tcg-op-common.h
M include/tcg/tcg-op.h
M include/tcg/tcg-opc.h
M include/tcg/tcg.h
M target/alpha/translate.c
M target/arm/hvf/hvf.c
M target/arm/kvm64.c
M target/arm/tcg/translate-a64.c
M target/arm/tcg/translate.c
M target/cris/translate.c
M target/i386/hvf/hvf.c
M target/i386/kvm/kvm.c
M target/m68k/translate.c
M target/openrisc/translate.c
M target/ppc/kvm.c
M target/ppc/translate/fixedpoint-impl.c.inc
M target/ppc/translate/vmx-impl.c.inc
M target/riscv/vector_helper.c
M target/rx/op_helper.c
M target/s390x/kvm/kvm.c
M target/sparc/translate.c
M target/tricore/translate.c
M tcg/aarch64/tcg-target.c.inc
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.c.inc
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target-con-set.h
M tcg/i386/tcg-target-con-str.h
M tcg/i386/tcg-target.c.inc
M tcg/i386/tcg-target.h
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/optimize.c
M tcg/ppc/tcg-target.c.inc
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.c.inc
M tcg/riscv/tcg-target.h
M tcg/s390x/tcg-target.c.inc
M tcg/s390x/tcg-target.h
M tcg/sparc64/tcg-target.c.inc
M tcg/sparc64/tcg-target.h
M tcg/tcg-op-gvec.c
M tcg/tcg-op.c
M tcg/tcg.c
M tcg/tci/tcg-target.h
Log Message:
-----------
Merge tag 'pull-tcg-20230823-2' of https://gitlab.com/rth7680/qemu into
staging
accel/*: Widen pc/saved_insn for *_sw_breakpoint
accel/tcg: Replace remaining target_ulong in system-mode accel
tcg: spelling fixes
tcg: Document bswap, hswap, wswap byte patterns
tcg: Introduce negsetcond opcodes
tcg: Fold deposit with zero to and
tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32
tcg/i386: Drop BYTEH deposits for 64-bit
tcg/i386: Allow immediate as input to deposit
target/*: Use tcg_gen_negsetcond_*
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[full]
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* tag 'pull-tcg-20230823-2' of https://gitlab.com/rth7680/qemu: (48 commits)
tcg: spelling fixes
docs/devel/tcg-ops: fix missing newlines in "Host vector operations"
target/cris: Fix a typo in gen_swapr()
tcg/tcg-op: Document wswap_i64() byte pattern
tcg/tcg-op: Document hswap_i32/64() byte pattern
tcg/tcg-op: Document bswap64_i64() byte pattern
tcg/tcg-op: Document bswap32_i64() byte pattern
tcg/tcg-op: Document bswap32_i32() byte pattern
tcg/tcg-op: Document bswap16_i64() byte pattern
tcg/tcg-op: Document bswap16_i32() byte pattern
tcg/i386: Implement negsetcond_*
tcg/i386: Use shift in tcg_out_setcond
tcg/i386: Clear dest first in tcg_out_setcond if possible
tcg/i386: Use CMP+SBB in tcg_out_setcond
tcg/i386: Merge tcg_out_movcond{32,64}
tcg/i386: Merge tcg_out_setcond{32,64}
tcg/i386: Merge tcg_out_brcond{32,64}
tcg/sparc64: Implement negsetcond_*
tcg/s390x: Implement negsetcond_*
tcg/riscv: Implement negsetcond_*
...
Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com>
Compare: https://github.com/qemu/qemu/compare/50e7a40af372...f5fe7c17ac4e
