Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: b3ee719e6499987a635332d012f08dc80cd277e0 https://github.com/qemu/qemu/commit/b3ee719e6499987a635332d012f08dc80cd277e0 Author: Richard Henderson <richard.hender...@linaro.org> Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths: M include/tcg/tcg-op-gvec-common.h M tcg/tcg-op-gvec.c Log Message: ----------- tcg: Add write_aofs to GVecGen3i Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org> Signed-off-by: Richard Henderson <richard.hender...@linaro.org> Commit: 2623ca6ac11dd1c15ec1c2e87aa2e7f22f0adec8 https://github.com/qemu/qemu/commit/2623ca6ac11dd1c15ec1c2e87aa2e7f22f0adec8 Author: Richard Henderson <richard.hender...@linaro.org> Date: 2024-05-06 (Mon, 06 May 2024) Changed paths: M tcg/i386/tcg-target.c.inc Log Message: ----------- tcg/i386: Simplify immediate 8-bit logical vector shifts The x86 isa does not have this operation, so we need an expansion. Use the same algorithm that we use for expanding this vector operation with integers: perform the shift with a wider type and then mask the bits that must be zero. This reduces the instruction count from 5 to 2. Signed-off-by: Richard Henderson <richard.hender...@linaro.org> Commit: 19517b8397940955c2638700f9cad3dbdb90c4c0 https://github.com/qemu/qemu/commit/19517b8397940955c2638700f9cad3dbdb90c4c0 Author: Richard Henderson <richard.hender...@linaro.org> Date: 2024-05-06 (Mon, 06 May 2024) Changed paths: M tcg/i386/tcg-target.c.inc Log Message: ----------- tcg/i386: Optimize setcond of TST{EQ,NE} with 0xffffffff This may be treated as a 32-bit EQ/NE comparison against 0, which is in turn treated as a LTU/GEU comparison against 1. Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org> Signed-off-by: Richard Henderson <richard.hender...@linaro.org> Commit: 8d65cda7284edf31998778f92813bc6ef1e6ab77 https://github.com/qemu/qemu/commit/8d65cda7284edf31998778f92813bc6ef1e6ab77 Author: Richard Henderson <richard.hender...@linaro.org> Date: 2024-05-06 (Mon, 06 May 2024) Changed paths: M tcg/optimize.c Log Message: ----------- tcg/optimize: Optimize setcond with zmask If we can show that high bits of an input are zero, then we may optimize away some comparisons. Signed-off-by: Richard Henderson <richard.hender...@linaro.org> Commit: d828b92b8a61204d8a7aaa87a24e48ac7ab69143 https://github.com/qemu/qemu/commit/d828b92b8a61204d8a7aaa87a24e48ac7ab69143 Author: Richard Henderson <richard.hender...@linaro.org> Date: 2024-05-06 (Mon, 06 May 2024) Changed paths: M accel/tcg/cpu-exec.c M include/exec/translation-block.h Log Message: ----------- accel/tcg: Introduce CF_BP_PAGE Record the fact that we've found a breakpoint on the page in which a TranslationBlock is running. Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org> Signed-off-by: Richard Henderson <richard.hender...@linaro.org> Commit: ca51921158e3cc07520a0ef5eb33739e5852ac6e https://github.com/qemu/qemu/commit/ca51921158e3cc07520a0ef5eb33739e5852ac6e Author: Richard Henderson <richard.hender...@linaro.org> Date: 2024-05-06 (Mon, 06 May 2024) Changed paths: M target/sh4/translate.c Log Message: ----------- target/sh4: Update DisasContextBase.insn_start Match the extra inserts of INDEX_op_insn_start, fixing the db->num_insns != 1 assert in translator_loop. Fixes: dcd092a0636 ("accel/tcg: Improve can_do_io management") Signed-off-by: Richard Henderson <richard.hender...@linaro.org> Commit: a55a1f77b6c4270f6c19a74e9aa4c83c3bb04e09 https://github.com/qemu/qemu/commit/a55a1f77b6c4270f6c19a74e9aa4c83c3bb04e09 Author: Richard Henderson <richard.hender...@linaro.org> Date: 2024-05-06 (Mon, 06 May 2024) Changed paths: M .gitlab-ci.d/custom-runners/ubuntu-22.04-s390x.yml Log Message: ----------- gitlab: Drop --disable-libssh from ubuntu-22.04-s390x.yml This was a workaround for ubuntu 20.04. Suggested-by: Thomas Huth <th...@redhat.com> Signed-off-by: Richard Henderson <richard.hender...@linaro.org> Commit: 22e8db9deb96d2cd88492adf4047087c9d9d575d https://github.com/qemu/qemu/commit/22e8db9deb96d2cd88492adf4047087c9d9d575d Author: Richard Henderson <richard.hender...@linaro.org> Date: 2024-05-06 (Mon, 06 May 2024) Changed paths: M .gitlab-ci.d/custom-runners/ubuntu-22.04-s390x.yml Log Message: ----------- gitlab: Drop --static from s390x linux-user build The host does not have the correct libraries installed for static pie, which causes host/guest address space interference for some tests. There's no real gain from linking statically, so drop it. Reviewed-by: Thomas Huth <th...@redhat.com> Signed-off-by: Richard Henderson <richard.hender...@linaro.org> Commit: f578b66e8c70ddea71d44db6e2c7abbcd757d684 https://github.com/qemu/qemu/commit/f578b66e8c70ddea71d44db6e2c7abbcd757d684 Author: Richard Henderson <richard.hender...@linaro.org> Date: 2024-05-06 (Mon, 06 May 2024) Changed paths: M .gitlab-ci.d/custom-runners/ubuntu-22.04-s390x.yml Log Message: ----------- gitlab: Streamline ubuntu-22.04-s390x We have one job to build user binaries and one job for system. Disable tools and docs in the user job, and disable building the user binaries in the system job. Reviewed-by: Thomas Huth <th...@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org> Signed-off-by: Richard Henderson <richard.hender...@linaro.org> Commit: 571882c668a0861bf4fcc0411347eab2379200e5 https://github.com/qemu/qemu/commit/571882c668a0861bf4fcc0411347eab2379200e5 Author: Richard Henderson <richard.hender...@linaro.org> Date: 2024-05-07 (Tue, 07 May 2024) Changed paths: M .gitlab-ci.d/custom-runners/ubuntu-22.04-s390x.yml M accel/tcg/cpu-exec.c M include/exec/translation-block.h M include/tcg/tcg-op-gvec-common.h M target/sh4/translate.c M tcg/i386/tcg-target.c.inc M tcg/optimize.c M tcg/tcg-op-gvec.c Log Message: ----------- Merge tag 'pull-tcg-20240507' of https://gitlab.com/rth7680/qemu into staging tcg: Add write_aofs to GVecGen3i tcg/i386: Simplify immediate 8-bit logical vector shifts tcg/i386: Optimize setcond of TST{EQ,NE} with 0xffffffff tcg/optimize: Optimize setcond with zmask accel/tcg: Introduce CF_BP_PAGE target/sh4: Update DisasContextBase.insn_start gitlab: Drop --static from s390x linux-user build gitlab: Streamline ubuntu-22.04-s390x # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmY6OoAdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8FEwf7Bhs9bV2Kp4LxUzGq # +dSHHc/WuCyIILLDQ4kZyXvILuI59wYhrWBUUTzBnAZ/tEf0oMG2y57F/lIcxz9w # VvsFicMOhtjQ8iBEfl/rkkaYs9BLcxqMTAA3PxNBE6l3bzjcHSTkhey4MoPGRibn # CkwaLzb2ebNjfgzC1IsNf/tyiMXl0tBQM7JVV4EztaOGEmqw8X0/PyVZDiC3WUNC # tf9yqiNIlgGkn7rj3sT/rNdi4xlzQybgrb1MCFT6z5cqsW2bwqivRpxHi4yulHKI # VhYA3kud+TX2ASukpibsSkA+9SbcH/qwOugPhPIu+KANsFUcVKL6Anzv6Ysl9kZ0 # +Wnbow== # =FJCW # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 May 2024 07:28:16 AM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.hender...@linaro.org" # gpg: Good signature from "Richard Henderson <richard.hender...@linaro.org>" [ultimate] * tag 'pull-tcg-20240507' of https://gitlab.com/rth7680/qemu: gitlab: Streamline ubuntu-22.04-s390x gitlab: Drop --static from s390x linux-user build gitlab: Drop --disable-libssh from ubuntu-22.04-s390x.yml target/sh4: Update DisasContextBase.insn_start accel/tcg: Introduce CF_BP_PAGE tcg/optimize: Optimize setcond with zmask tcg/i386: Optimize setcond of TST{EQ,NE} with 0xffffffff tcg/i386: Simplify immediate 8-bit logical vector shifts tcg: Add write_aofs to GVecGen3i Signed-off-by: Richard Henderson <richard.hender...@linaro.org> Compare: https://github.com/qemu/qemu/compare/e116b92d01c2...571882c668a0 To unsubscribe from these emails, change your notification settings at https://github.com/qemu/qemu/settings/notifications