Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 71365ee433125026d9744a0a37142c81ff312b53
      
https://github.com/qemu/qemu/commit/71365ee433125026d9744a0a37142c81ff312b53
  Author: Vincent Vanlaer <libvirt-e6954...@volkihar.be>
  Date:   2025-04-29 (Tue, 29 Apr 2025)

  Changed paths:
    M block/commit.c

  Log Message:
  -----------
  block: get type of block allocation in commit_run

bdrv_co_common_block_status_above not only returns whether the block is
allocated, but also if it contains zeroes.

Signed-off-by: Vincent Vanlaer <libvirt-e6954...@volkihar.be>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>
Message-Id: <20241026163010.2865002-2-libvirt-e6954...@volkihar.be>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>


  Commit: 23743ab282af4fbb80fdc049bff2c93668c73c83
      
https://github.com/qemu/qemu/commit/23743ab282af4fbb80fdc049bff2c93668c73c83
  Author: Vincent Vanlaer <libvirt-e6954...@volkihar.be>
  Date:   2025-04-29 (Tue, 29 Apr 2025)

  Changed paths:
    M block/commit.c

  Log Message:
  -----------
  block: move commit_run loop to separate function

Signed-off-by: Vincent Vanlaer <libvirt-e6954...@volkihar.be>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>
Message-Id: <20241026163010.2865002-3-libvirt-e6954...@volkihar.be>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>


  Commit: 0648c76ad198e91515771fbbeaac3a3807669a4a
      
https://github.com/qemu/qemu/commit/0648c76ad198e91515771fbbeaac3a3807669a4a
  Author: Vincent Vanlaer <libvirt-e6954...@volkihar.be>
  Date:   2025-05-01 (Thu, 01 May 2025)

  Changed paths:
    M block/commit.c

  Log Message:
  -----------
  block: refactor error handling of commit_iteration

Signed-off-by: Vincent Vanlaer <libvirt-e6954...@volkihar.be>
Message-Id: <20241026163010.2865002-4-libvirt-e6954...@volkihar.be>
[vsementsov]: move action declaration to the top of the function
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>


  Commit: 6f3199f99600fe75f32f78574e507f347de80854
      
https://github.com/qemu/qemu/commit/6f3199f99600fe75f32f78574e507f347de80854
  Author: Vincent Vanlaer <libvirt-e6954...@volkihar.be>
  Date:   2025-05-01 (Thu, 01 May 2025)

  Changed paths:
    M block/commit.c

  Log Message:
  -----------
  block: allow commit to unmap zero blocks

Non-active block commits do not discard blocks only containing zeros,
causing images to lose sparseness after the commit. This commit fixes
that by writing zero blocks using blk_co_pwrite_zeroes rather than
writing them out as any other arbitrary data.

Signed-off-by: Vincent Vanlaer <libvirt-e6954...@volkihar.be>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>
Message-Id: <20241026163010.2865002-5-libvirt-e6954...@volkihar.be>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>


  Commit: 68aba2a9350345d109f8036f9eff68b81b1c2167
      
https://github.com/qemu/qemu/commit/68aba2a9350345d109f8036f9eff68b81b1c2167
  Author: Vincent Vanlaer <libvirt-e6954...@volkihar.be>
  Date:   2025-05-01 (Thu, 01 May 2025)

  Changed paths:
    A tests/qemu-iotests/tests/commit-zero-blocks
    A tests/qemu-iotests/tests/commit-zero-blocks.out

  Log Message:
  -----------
  block: add test non-active commit with zeroed data

Signed-off-by: Vincent Vanlaer <libvirt-e6954...@volkihar.be>
Tested-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>
Message-Id: <20241026163010.2865002-6-libvirt-e6954...@volkihar.be>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>


  Commit: da17dd5c5ee8e33124da0bf91aed11491d0c04de
      
https://github.com/qemu/qemu/commit/da17dd5c5ee8e33124da0bf91aed11491d0c04de
  Author: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>
  Date:   2025-05-01 (Thu, 01 May 2025)

  Changed paths:
    M qapi/block-core.json
    M qapi/job.json

  Log Message:
  -----------
  qapi: synchronize jobs and block-jobs documentation

Actualize documentation and synchronize it for commands which actually
call the same functions internally.

Reviewed-by: Markus Armbruster <arm...@redhat.com>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>
Message-ID: <20250409084232.28201-2-vsement...@yandex-team.ru>


  Commit: b836bf2ab68fbc1e253c10bee95fa36399762967
      
https://github.com/qemu/qemu/commit/b836bf2ab68fbc1e253c10bee95fa36399762967
  Author: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>
  Date:   2025-05-01 (Thu, 01 May 2025)

  Changed paths:
    M docs/about/deprecated.rst
    M qapi/block-core.json

  Log Message:
  -----------
  qapi/block-core: deprecate some block-job- APIs

For change, pause, resume, complete, dismiss and finalize actions
corresponding job- and block-job commands are almost equal. The
difference is in find_block_job_locked() vs find_job_locked()
functions. What's different?

1. find_block_job_locked() checks whether the found job is a block-job.
   This is OK when moving to more generic API, no needs to document this
   change.

2. find_block_job_locked() reports DeviceNotActive on failure, when
   find_job_locked() reports GenericError. So, let's document this
   difference in deprecated.txt. Still, for dismiss and finalize errors
   are not documented at all, so be silent in deprecated.txt as well.

ACKed-by: Peter Krempa <pkre...@redhat.com>
Reviewed-by: Eric Blake <ebl...@redhat.com>
Reviewed-by: Markus Armbruster <arm...@redhat.com>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>
Message-ID: <20250409084232.28201-3-vsement...@yandex-team.ru>


  Commit: 5346686182472c21a782a9346feaabe72b26f509
      
https://github.com/qemu/qemu/commit/5346686182472c21a782a9346feaabe72b26f509
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M meson.build
    M meson_options.txt
    M scripts/meson-buildoptions.sh

  Log Message:
  -----------
  meson: drop --enable-avx* options

Just detect compiler support and always enable the optimizations if
it is avilable; warn if the user did request AVX2/AVX512 use via
-Dx86_version= but the intrinsics are not available.

Suggested-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: e3c426cb78d47b42af9ab296408115cab20f2060
      
https://github.com/qemu/qemu/commit/e3c426cb78d47b42af9ab296408115cab20f2060
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M accel/tcg/meson.build
    M meson.build
    M tcg/meson.build

  Log Message:
  -----------
  meson: do not check supported TCG architecture if no emulators built

Errors about TCI are pointless if only tools are being built; suppress
them even if the user did not specify --disable-tcg.

Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: 911115838b29f222e47e5942b3182caf08ed08fd
      
https://github.com/qemu/qemu/commit/911115838b29f222e47e5942b3182caf08ed08fd
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M ui/meson.build

  Log Message:
  -----------
  meson: remove unnecessary dependencies from specific_ss

All dependencies that are in common_ss (which includes system_ss) automatically
have their include path added when building the target-specific files.  So the
hack in ui/meson.build is not needed anymore since commit 727bb5b477e ("meson:
pick libfdt from common_ss when building target-specific files", 2024-05-10);
drop it.

Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: 95d313127d5f4b4c3030222f4d45c49686b11f1d
      
https://github.com/qemu/qemu/commit/95d313127d5f4b4c3030222f4d45c49686b11f1d
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M meson.build
    M scripts/modinfo-collect.py

  Log Message:
  -----------
  modinfo: lookup compile_commands.json by object

Since modinfo support was added, Meson fixed several issues with
extract_objects and compile_commands.json lookups can be simplified.
If the lookup uses the object file as key, there is no need to use the
command line to distinguish among all entries for a given source.

Ninja 1.9 is required in order to produce the 'output' key in
compile_commands.json; it is available in CentOS Stream 9, Debian 11, SLES
15.2, Ubuntu 20.04 and in all recent BSD distros.  Samurai also has it.

Cc: Gerd Hoffmann <kra...@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lur...@redhat.com>
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: cc1f4b34d011e908dcaf24721f1d5808e02ab0bd
      
https://github.com/qemu/qemu/commit/cc1f4b34d011e908dcaf24721f1d5808e02ab0bd
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M rust/hw/char/pl011/src/device.rs

  Log Message:
  -----------
  rust: pl011: Rename RX FIFO methods

In preparation of having a TX FIFO, rename the RX FIFO methods.
This is the Rust version of commit 40871ca758cf ("hw/char/pl011:
Rename RX FIFO methods").

Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: 3d3911f16b6ceb9ed202aadf2cd75ded516a1a0b
      
https://github.com/qemu/qemu/commit/3d3911f16b6ceb9ed202aadf2cd75ded516a1a0b
  Author: Raman Dzehtsiar <raman.dzehts...@gmail.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M block/backup.c
    M block/copy-before-write.c
    M block/copy-before-write.h
    M block/replication.c
    M blockdev.c
    M include/block/block_int-global-state.h
    M qapi/block-core.json
    M tests/qemu-iotests/tests/copy-before-write
    M tests/qemu-iotests/tests/copy-before-write.out

  Log Message:
  -----------
  blockdev-backup: Add error handling option for copy-before-write jobs

This patch extends the blockdev-backup QMP command to allow users to specify
how to behave when IO errors occur during copy-before-write operations.
Previously, the behavior was fixed and could not be controlled by the user.

The new 'on-cbw-error' option can be set to one of two values:
- 'break-guest-write': Forwards the IO error to the guest and triggers
  the on-source-error policy. This preserves snapshot integrity at the
  expense of guest IO operations.
- 'break-snapshot': Allows the guest OS to continue running normally,
  but invalidates the snapshot and aborts related jobs. This prioritizes
  guest operation over backup consistency.

This enhancement provides more flexibility for backup operations in different
environments where requirements for guest availability versus backup
consistency may vary.

The default behavior remains unchanged to maintain backward compatibility.

Signed-off-by: Raman Dzehtsiar <raman.dzehts...@gmail.com>
Message-ID: <20250414090025.828660-1-raman.dzehts...@gmail.com>
Acked-by: Markus Armbruster <arm...@redhat.com>
[vsementsov: fix long lines]
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>
Tested-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsement...@yandex-team.ru>


  Commit: ac2c4d3aed5bf91eaed861d3b98f839ea4357643
      
https://github.com/qemu/qemu/commit/ac2c4d3aed5bf91eaed861d3b98f839ea4357643
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M docs/devel/rust.rst
    M rust/hw/char/pl011/src/device.rs

  Log Message:
  -----------
  rust: pl011: Really use RX FIFO depth

While we model a 16-elements RX FIFO since the PL011 model was
introduced in commit cdbdb648b7c ("ARM Versatile Platform Baseboard
emulation"), we only read 1 char at a time!

Have can_receive() return how many elements are available, and use that
in receive().

This is the Rust version of commit 3e0f118f825 ("hw/char/pl011: Really
use RX FIFO depth"); but it also adds back a comment that is present
in commit f576e0733cc ("hw/char/pl011: Add support for loopback") and
absent in the Rust code.

Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: 336dbe8e9993da447630f7edb59152dd7edcdcd1
      
https://github.com/qemu/qemu/commit/336dbe8e9993da447630f7edb59152dd7edcdcd1
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M target/i386/tcg/decode-new.c.inc

  Log Message:
  -----------
  target/i386: ignore misplaced REX prefixes

Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: 0f1f06ca61d8f1290780829728603c570834b3c0
      
https://github.com/qemu/qemu/commit/0f1f06ca61d8f1290780829728603c570834b3c0
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M target/i386/cpu.c

  Log Message:
  -----------
  target/i386: list TCG-supported features for CPUID[80000021h].EAX

Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: c7c332831fa79c6d58ac53dab1c195041a4ba687
      
https://github.com/qemu/qemu/commit/c7c332831fa79c6d58ac53dab1c195041a4ba687
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M target/i386/tcg/seg_helper.c

  Log Message:
  -----------
  target/i386: move push of error code to switch_tss_ra

Move it there so that it can be done before the TSS trap bit is
processed.

Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: ad441b8b7913a26b18edbc076c74ca0cdbfa4ee5
      
https://github.com/qemu/qemu/commit/ad441b8b7913a26b18edbc076c74ca0cdbfa4ee5
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M target/i386/tcg/seg_helper.c

  Log Message:
  -----------
  target/i386: implement TSS trap bit

Now that we can do so after the error code has been pushed, raising
the #DB exception for task-switch traps is trivial.

Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: 77a2dba45cc9a1be7fec6ab88f43d2fa18af52a3
      
https://github.com/qemu/qemu/commit/77a2dba45cc9a1be7fec6ab88f43d2fa18af52a3
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M target/i386/emulate/x86_decode.c
    M target/i386/emulate/x86_decode.h
    M target/i386/emulate/x86_emu.c
    M target/i386/emulate/x86_emu.h

  Log Message:
  -----------
  target/i386/emulate: stop overloading decode->op[N].ptr

decode->op[N].ptr can contain either a host pointer (!) in CPUState
or a guest virtual address.  Pass the whole struct to read_val_ext
and write_val_ext, so that it can decide the contents based on the
operand type.

Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: 5b80dcf95b9a196c15c12b0226f93732c1b1a843
      
https://github.com/qemu/qemu/commit/5b80dcf95b9a196c15c12b0226f93732c1b1a843
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M target/i386/emulate/x86_emu.c
    M target/i386/emulate/x86_flags.c
    M target/i386/emulate/x86_flags.h

  Log Message:
  -----------
  target/i386/emulate: mostly rewrite flags handling

While Bochs's algorithms are pretty solid, there are small opportunities
to improve them or to make their logic more similar to TCG's handling
of condition codes.

- use a single bit for the difference between bits 0..7 of result and PF.
This is useful because "set only ZF" is not a common case.

- place SD in the same place as SF

- move CF and PO at bits 62 and 63 when target_ulong is 64-bits wide,
  so that 64-bit ALU operations need fewer shifts

- use rotates to move CF and AF from auxbits to their eflags position

Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: d521fdc73f6ec09fd3f7a37913a6344c86b6c32c
      
https://github.com/qemu/qemu/commit/d521fdc73f6ec09fd3f7a37913a6344c86b6c32c
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M target/i386/cpu.h
    M target/i386/emulate/x86_emu.c
    M target/i386/emulate/x86_flags.c

  Log Message:
  -----------
  target/i386: remove lflags

Just use cc_dst and cc_src for the same purpose.

Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: 428c0acd953a626dab55e2c07401ce99c2271119
      
https://github.com/qemu/qemu/commit/428c0acd953a626dab55e2c07401ce99c2271119
  Author: Paolo Bonzini <pbonz...@redhat.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M linux-headers/asm-x86/kvm.h
    M linux-headers/linux/kvm.h

  Log Message:
  -----------
  linux-headers: update from 6.15 + kvm/next

This brings in the userspace TDX API.

Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: bbdbc47b5c6907e065f84e751d127dae3cebfd54
      
https://github.com/qemu/qemu/commit/bbdbc47b5c6907e065f84e751d127dae3cebfd54
  Author: Zheng Huang <hz1624917...@gmail.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M hw/audio/cs4231a.c

  Log Message:
  -----------
  hw/audio/cs4231a: fix assertion error in isa_bus_get_irq

This patch fixes an assertion error in isa_bus_get_irq() in
/hw/isa/isa-bus.c by adding a constraint to the irq property.
Patch v1 misused ISA_NUM_IRQS, pls ignore that.

Signed-off-by: Zheng Huang <hz1624917...@gmail.com>
Link: https://lore.kernel.org/r/6d228069-e38f-4c46-813f-edcccc5c4...@gmail.com
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: 74978391b2da0116b9109d52931f342118d5a122
      
https://github.com/qemu/qemu/commit/74978391b2da0116b9109d52931f342118d5a122
  Author: Pawan Gupta <pawan.kumar.gu...@linux.intel.com>
  Date:   2025-05-12 (Mon, 12 May 2025)

  Changed paths:
    M target/i386/cpu.c

  Log Message:
  -----------
  target/i386: Make ITS_NO available to guests

When a system is not affected by Indirect Target Selection (ITS)
vulnerability, VMMs set ITS_NO bit in MSR IA32_ARCH_CAPABILITIES to let the
guest know that it is not affected.

Make it available to guests.

Signed-off-by: Pawan Gupta <pawan.kumar.gu...@linux.intel.com>
Link: 
https://lore.kernel.org/r/8c1797e488b42650f62d816f25c58726eb522fad.1745946029.git.pawan.kumar.gu...@linux.intel.com
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>


  Commit: ab9bbee3c7da3d5dcce03bd7379bc7d05243a9af
      
https://github.com/qemu/qemu/commit/ab9bbee3c7da3d5dcce03bd7379bc7d05243a9af
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c
    M hw/loongarch/virt.c
    M include/hw/intc/loongarch_pic_common.h

  Log Message:
  -----------
  hw/intc/loongarch_pch: Modify name of some registers

For some registers with width 8 bytes, its name is something like
PCH_PIC_INT_ID_LO and PCH_PIC_INT_ID_HI. From hardware manual,
register name is PCH_PIC_INT_ID instead. Here name PCH_PIC_INT_ID
is used, and PCH_PIC_INT_ID + 4 is used for PCH_PIC_INT_ID_HI.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Clement Mathieu--Drif <clement.mathieu--d...@eviden.com>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023148.1877287-2-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: 4f0f2ab5640efe7f27b193f2bf66656890d6143f
      
https://github.com/qemu/qemu/commit/4f0f2ab5640efe7f27b193f2bf66656890d6143f
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c
    M hw/loongarch/virt.c
    M include/hw/intc/loongarch_pic_common.h

  Log Message:
  -----------
  hw/intc/loongarch_pch: Modify register name PCH_PIC_xxx_OFFSET with 
PCH_PIC_xxx

Macro PCH_PIC_HTMSI_VEC_OFFSET and PCH_PIC_ROUTE_ENTRY_OFFSET is renamed
as PCH_PIC_HTMSI_VEC and PCH_PIC_ROUTE_ENTRY separately, it is easier to
understand.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Clement Mathieu--Drif <clement.mathieu--d...@eviden.com>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023148.1877287-3-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: e95e4e818b7821a66c4346761c6f63b93177685a
      
https://github.com/qemu/qemu/commit/e95e4e818b7821a66c4346761c6f63b93177685a
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c
    M include/hw/intc/loongarch_pic_common.h

  Log Message:
  -----------
  hw/intc/loongarch_pch: Remove some duplicate macro

The meaning of macro definition STATUS_LO_START is simliar with
PCH_PIC_INT_STATUS, only that offset is different, the same for
macro POL_LO_START. Now remove these duplicated macro definitions.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023148.1877287-4-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: c2658b0de5cb24b6eb49751c92380d30f1d9258f
      
https://github.com/qemu/qemu/commit/c2658b0de5cb24b6eb49751c92380d30f1d9258f
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c
    M hw/intc/loongarch_pic_common.c
    M include/hw/intc/loongarch_pic_common.h

  Log Message:
  -----------
  hw/intc/loongarch_pch: Set version information at initial stage

Register PCH_PIC_INT_ID constains version and supported irq number
information, and it is read only register. The detailed value can
be set at initial stage, rather than read callback.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023148.1877287-5-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: ab3ab67348b1e34630272b05f9f7f187fd6a1f8f
      
https://github.com/qemu/qemu/commit/ab3ab67348b1e34630272b05f9f7f187fd6a1f8f
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c

  Log Message:
  -----------
  hw/intc/loongarch_pch: Use relative address in MemoryRegionOps

Parameter address for read and write callback in MemoryRegionOps is
relative offset with base address of this MemoryRegionOps. It can
be directly used as offset and offset calculation can be removed.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023148.1877287-6-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: 53339a8120d9be6a448f29dd1138bab2fa15e34d
      
https://github.com/qemu/qemu/commit/53339a8120d9be6a448f29dd1138bab2fa15e34d
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c

  Log Message:
  -----------
  hw/intc/loongarch_pch: Discard write operation with ISR register

With the latest 7A1000 user manual, interrupt status register ISR is
read only. Here discard write operation with ISR register.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023148.1877287-7-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: 9e29bf4e4c5d34ace0c75737f740f1f86236dba9
      
https://github.com/qemu/qemu/commit/9e29bf4e4c5d34ace0c75737f740f1f86236dba9
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c

  Log Message:
  -----------
  hw/intc/loongarch_pch: Use generic read callback for iomem32_low region

For memory region iomem32_low, generic read callback is used.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023148.1877287-8-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: 6dab13c4152b5b3c35b627483bfdce2d331d95f2
      
https://github.com/qemu/qemu/commit/6dab13c4152b5b3c35b627483bfdce2d331d95f2
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c

  Log Message:
  -----------
  hw/intc/loongarch_pch: Use generic read callback for iomem32_high region

Add register read operation emulation in generic read function
loongarch_pch_pic_read(), and use this function for iomem32_high region.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023148.1877287-9-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: 81de67213d29a401bc341abe75abd120ad22b25a
      
https://github.com/qemu/qemu/commit/81de67213d29a401bc341abe75abd120ad22b25a
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c

  Log Message:
  -----------
  hw/intc/loongarch_pch: Use generic read callback for iomem8 region

Add iomem8 region register read operation emulation in generic read
function loongarch_pch_pic_read(), and use this function for iomem8
region.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023148.1877287-10-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: f5dc4993fc5cee1a6fcfca1e4728af2fe965f98e
      
https://github.com/qemu/qemu/commit/f5dc4993fc5cee1a6fcfca1e4728af2fe965f98e
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c

  Log Message:
  -----------
  hw/intc/loongarch_pch: Use generic write callback for iomem32_low region

For memory region iomem32_low, generic write callback is used.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023148.1877287-11-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: 2618d65036d4c05771727784ec665132689e2608
      
https://github.com/qemu/qemu/commit/2618d65036d4c05771727784ec665132689e2608
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c

  Log Message:
  -----------
  hw/intc/loongarch_pch: Use generic write callback for iomem32_high region

Add iomem32_high region register write operation emulation in generic
write function loongarch_pch_pic_write(), and use this function for
iomem32_high region.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023148.1877287-12-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: a6fdd0032ce5c7cd5c49a1bfbcedf6c08e136682
      
https://github.com/qemu/qemu/commit/a6fdd0032ce5c7cd5c49a1bfbcedf6c08e136682
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c

  Log Message:
  -----------
  hw/intc/loongarch_pch: Use generic write callback for iomem8 region

Add iomem8 region register write operation emulation in generic write
function loongarch_pch_pic_write(), and use this function for iomem8
region.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023754.1877445-1-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: ba23cce0dcc75d2211f875e758305e3636e7c0a4
      
https://github.com/qemu/qemu/commit/ba23cce0dcc75d2211f875e758305e3636e7c0a4
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c
    M hw/intc/trace-events

  Log Message:
  -----------
  hw/intc/loongarch_pch: Use unified trace event for memory region ops

Add trace event trace_loongarch_pch_pic_read(), replaces the following
three events:
  trace_loongarch_pch_pic_low_readw()
  trace_loongarch_pch_pic_high_readw()
  trace_loongarch_pch_pic_readb()
The similiar with write trace event.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023754.1877445-2-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: ce5efc2f44d1a2809c4adb2bad2083db29a03c71
      
https://github.com/qemu/qemu/commit/ce5efc2f44d1a2809c4adb2bad2083db29a03c71
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c
    M include/hw/intc/loongarch_pic_common.h

  Log Message:
  -----------
  hw/intc/loongarch_pch: Rename memory region iomem32_low with iomem

Rename memory region iomem32_low with iomem, also change ops name
as follows:
  loongarch_pch_pic_reg32_low_ops  --> loongarch_pch_pic_ops
  loongarch_pch_pic_low_readw      --> loongarch_pch_pic_read
  loongarch_pch_pic_low_writew     --> loongarch_pch_pic_write

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023754.1877445-3-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: 2493ff01dc7c9b06a0579f6e66c3df69da4d5d23
      
https://github.com/qemu/qemu/commit/2493ff01dc7c9b06a0579f6e66c3df69da4d5d23
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c

  Log Message:
  -----------
  hw/intc/loongarch_pch: Set flexible memory access size with iomem region

The original iomem region only supports 4 bytes access size, set it ok
with 1/2/4/8 bytes. Also unaligned memory access is not supported.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023754.1877445-4-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: f4881c67ba8a852687566610949d8e9ab0542a31
      
https://github.com/qemu/qemu/commit/f4881c67ba8a852687566610949d8e9ab0542a31
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c
    M hw/loongarch/virt.c
    M include/hw/intc/loongarch_pic_common.h

  Log Message:
  -----------
  hw/intc/loongarch_pch: Merge three memory region into one

Since memory region iomem supports memory access size with 1/2/4/8,
it can be used for memory region iomem8 and iomem32_high. Now remove
memory region iomem8 and iomem32_high, merge them into iomem together.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>
Message-Id: <20250507023754.1877445-5-maob...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: a3d5f62254a48b7c260d5aa7bd8e8467a0bb8ea3
      
https://github.com/qemu/qemu/commit/a3d5f62254a48b7c260d5aa7bd8e8467a0bb8ea3
  Author: Xianglai Li <lixiang...@loongson.cn>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/loongarch/boot.c

  Log Message:
  -----------
  hw/loongarch/boot: Adjust the loading position of the initrd

When only the -kernel parameter is used to load the elf kernel, the initrd
is loaded in the ram. If the initrd size is too large, the loading fails,
resulting in a VM startup failure. This patch first loads initrd near
the kernel.

When the nearby memory space of the kernel is insufficient, it tries to
load it to the starting position of high memory. If there is still not
enough, qemu will report an error and ask the user to increase the memory
space for the virtual machine to boot.

Signed-off-by: Xianglai Li <lixiang...@loongson.cn>
Message-Id: <20250506080946.817092-1-lixiang...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>


  Commit: a114a6a5398d36927b6b4935d0ff13811412e507
      
https://github.com/qemu/qemu/commit/a114a6a5398d36927b6b4935d0ff13811412e507
  Author: Stefan Hajnoczi <stefa...@redhat.com>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M block/backup.c
    M block/commit.c
    M block/copy-before-write.c
    M block/copy-before-write.h
    M block/replication.c
    M blockdev.c
    M docs/about/deprecated.rst
    M include/block/block_int-global-state.h
    M qapi/block-core.json
    M qapi/job.json
    A tests/qemu-iotests/tests/commit-zero-blocks
    A tests/qemu-iotests/tests/commit-zero-blocks.out
    M tests/qemu-iotests/tests/copy-before-write
    M tests/qemu-iotests/tests/copy-before-write.out

  Log Message:
  -----------
  Merge tag 'pull-block-jobs-2025-04-29-v3' of 
https://gitlab.com/vsementsov/qemu into staging

block-job patches

- deprecate some old block-job- APIs
- on-cbw-error option for backup
- more efficient zero handling in block commit

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# gpg: Signature made Mon 12 May 2025 11:24:12 EDT
# gpg:                using RSA key 8B9C26CDB2FD147C880E86A1561F24C1F19F79FB
# gpg: Good signature from "Vladimir Sementsov-Ogievskiy 
<vsement...@yandex-team.ru>" [unknown]
# gpg:                 aka "Vladimir Sementsov-Ogievskiy 
<vsement...@virtuozzo.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8B9C 26CD B2FD 147C 880E  86A1 561F 24C1 F19F 79FB

* tag 'pull-block-jobs-2025-04-29-v3' of https://gitlab.com/vsementsov/qemu:
  blockdev-backup: Add error handling option for copy-before-write jobs
  qapi/block-core: deprecate some block-job- APIs
  qapi: synchronize jobs and block-jobs documentation
  block: add test non-active commit with zeroed data
  block: allow commit to unmap zero blocks
  block: refactor error handling of commit_iteration
  block: move commit_run loop to separate function
  block: get type of block allocation in commit_run

Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com>


  Commit: cacb211471e3a4b4abc517bfb2aef7bde5e71eaa
      
https://github.com/qemu/qemu/commit/cacb211471e3a4b4abc517bfb2aef7bde5e71eaa
  Author: Stefan Hajnoczi <stefa...@redhat.com>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M accel/tcg/meson.build
    M docs/devel/rust.rst
    M hw/audio/cs4231a.c
    M linux-headers/asm-x86/kvm.h
    M linux-headers/linux/kvm.h
    M meson.build
    M meson_options.txt
    M rust/hw/char/pl011/src/device.rs
    M scripts/meson-buildoptions.sh
    M scripts/modinfo-collect.py
    M target/i386/cpu.c
    M target/i386/cpu.h
    M target/i386/emulate/x86_decode.c
    M target/i386/emulate/x86_decode.h
    M target/i386/emulate/x86_emu.c
    M target/i386/emulate/x86_emu.h
    M target/i386/emulate/x86_flags.c
    M target/i386/emulate/x86_flags.h
    M target/i386/tcg/decode-new.c.inc
    M target/i386/tcg/seg_helper.c
    M tcg/meson.build
    M ui/meson.build

  Log Message:
  -----------
  Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* meson: small old patches (one from 2022)
* rust: pl011: forward port some changes from C version
* target/i386: small improvements to TCG emulation
* target/i386: HVF emulation cleanups
* target/i386: add its_no feature
* cs4231a: fix assertion failure
* update Linux headers

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# gpg: Signature made Mon 12 May 2025 15:03:57 EDT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonz...@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonz...@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonz...@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
  target/i386: Make ITS_NO available to guests
  hw/audio/cs4231a: fix assertion error in isa_bus_get_irq
  linux-headers: update from 6.15 + kvm/next
  target/i386: remove lflags
  target/i386/emulate: mostly rewrite flags handling
  target/i386/emulate: stop overloading decode->op[N].ptr
  target/i386: implement TSS trap bit
  target/i386: move push of error code to switch_tss_ra
  target/i386: list TCG-supported features for CPUID[80000021h].EAX
  target/i386: ignore misplaced REX prefixes
  rust: pl011: Really use RX FIFO depth
  rust: pl011: Rename RX FIFO methods
  modinfo: lookup compile_commands.json by object
  meson: remove unnecessary dependencies from specific_ss
  meson: do not check supported TCG architecture if no emulators built
  meson: drop --enable-avx* options

Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com>


  Commit: 864813878951b44e964eb4c012d832fd21f8cc0c
      
https://github.com/qemu/qemu/commit/864813878951b44e964eb4c012d832fd21f8cc0c
  Author: Stefan Hajnoczi <stefa...@redhat.com>
  Date:   2025-05-14 (Wed, 14 May 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c
    M hw/intc/loongarch_pic_common.c
    M hw/intc/trace-events
    M hw/loongarch/boot.c
    M hw/loongarch/virt.c
    M include/hw/intc/loongarch_pic_common.h

  Log Message:
  -----------
  Merge tag 'pull-loongarch-20250514' of https://github.com/gaosong715/qemu 
into staging

pull-loongarch-20250514

# -----BEGIN PGP SIGNATURE-----
#
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# 343NBACeXLcXkNfPDRsuYC/Z0iYrMO8HuQ6VAcN1f4H+qP6Uo7ywb13GpJTLmewD
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# =wdkQ
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 14 May 2025 04:00:03 EDT
# gpg:                using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF
# gpg: Good signature from "Song Gao <m17746591...@163.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C  6C2C 40A2 FFF2 3926 3EDF

* tag 'pull-loongarch-20250514' of https://github.com/gaosong715/qemu:
  hw/loongarch/boot: Adjust the loading position of the initrd
  hw/intc/loongarch_pch: Merge three memory region into one
  hw/intc/loongarch_pch: Set flexible memory access size with iomem region
  hw/intc/loongarch_pch: Rename memory region iomem32_low with iomem
  hw/intc/loongarch_pch: Use unified trace event for memory region ops
  hw/intc/loongarch_pch: Use generic write callback for iomem8 region
  hw/intc/loongarch_pch: Use generic write callback for iomem32_high region
  hw/intc/loongarch_pch: Use generic write callback for iomem32_low region
  hw/intc/loongarch_pch: Use generic read callback for iomem8 region
  hw/intc/loongarch_pch: Use generic read callback for iomem32_high region
  hw/intc/loongarch_pch: Use generic read callback for iomem32_low region
  hw/intc/loongarch_pch: Discard write operation with ISR register
  hw/intc/loongarch_pch: Use relative address in MemoryRegionOps
  hw/intc/loongarch_pch: Set version information at initial stage
  hw/intc/loongarch_pch: Remove some duplicate macro
  hw/intc/loongarch_pch: Modify register name PCH_PIC_xxx_OFFSET with 
PCH_PIC_xxx
  hw/intc/loongarch_pch: Modify name of some registers

Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com>


Compare: https://github.com/qemu/qemu/compare/69ee0189d797...864813878951

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