Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 606ad17b8708d13221fdf102d68e64068ad246c1
https://github.com/qemu/qemu/commit/606ad17b8708d13221fdf102d68e64068ad246c1
Author: Thomas Huth <th...@redhat.com>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M tests/functional/test_sparc64_tuxrun.py
Log Message:
-----------
tests/functional/test_sparc64_tuxrun: Explicitly set the 'sun4u' machine
Use self.set_machine() to set the machine instead of relying on the
default machine of the binary. This way the test can be skipped in
case the machine has not been compiled into the QEMU binary.
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Tested-by: Alex Bennée <alex.ben...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250521145112.142222-1-th...@redhat.com>
Commit: c93fd441c15faa8cdda6f1489d0cf14b73e7f9c3
https://github.com/qemu/qemu/commit/c93fd441c15faa8cdda6f1489d0cf14b73e7f9c3
Author: Thomas Huth <th...@redhat.com>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M tests/functional/test_mips_malta.py
Log Message:
-----------
tests/functional/test_mips_malta: Re-enable the check for the PCI host bridge
The problem with the PCI bridge has been fixed in commit e5894fd6f411c1
("hw/pci-host/gt64120: Fix endianness handling"), so we can enable the
corresponding test again.
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250522080208.205489-1-th...@redhat.com>
Commit: cb4b7406177683853466121e731a23acdf308467
https://github.com/qemu/qemu/commit/cb4b7406177683853466121e731a23acdf308467
Author: Thomas Huth <th...@redhat.com>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M tests/functional/test_mem_addr_space.py
Log Message:
-----------
tests/functional/test_mem_addr_space: Use set_machine() to select the machine
By using self.set_machine() the tests get properly skipped in case
the machine has not been compiled into the QEMU binary, e.g. when
"configure" has been run with "--without-default-devices".
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250521143732.140711-1-th...@redhat.com>
Commit: 4552b96409d50f1b3d377be017294617f326c220
https://github.com/qemu/qemu/commit/4552b96409d50f1b3d377be017294617f326c220
Author: Thomas Huth <th...@redhat.com>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/microblaze/petalogix_s3adsp1800_mmu.c
Log Message:
-----------
hw/microblaze: Add endianness property to the petalogix_s3adsp1800 machine
Since the microblaze target can now handle both endianness, big and
little, we should provide a config knob for the user to select the
desired endianness.
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250515132019.569365-2-th...@redhat.com>
Commit: 903c7dcac4dab13790b80d741455ee194618bbd0
https://github.com/qemu/qemu/commit/903c7dcac4dab13790b80d741455ee194618bbd0
Author: Thomas Huth <th...@redhat.com>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M tests/functional/test_microblaze_s3adsp1800.py
M tests/functional/test_microblazeel_s3adsp1800.py
Log Message:
-----------
tests/functional: Test both microblaze s3adsp1800 endianness variants
Now that the endianness of the petalogix-s3adsp1800 can be configured,
we should test that the cross-endianness also works as expected, thus
test the big endian variant on the little endian target and vice versa.
(based on an original idea from Philippe Mathieu-Daudé)
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250515132019.569365-3-th...@redhat.com>
Commit: 12f378f369b43ba350c6021d3ddb21a735e3e603
https://github.com/qemu/qemu/commit/12f378f369b43ba350c6021d3ddb21a735e3e603
Author: Thomas Huth <th...@redhat.com>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M docs/about/deprecated.rst
M docs/about/removed-features.rst
M hw/microblaze/petalogix_ml605_mmu.c
M hw/microblaze/xlnx-zynqmp-pmu.c
Log Message:
-----------
hw/microblaze: Remove the big-endian variants of ml605 and xlnx-zynqmp-pmu
Both machines were added with little-endian in mind only (the
"endianness" CPU property was hard-wired to "true", see commits
133d23b3ad1 and a88bbb006a52), so the variants that showed up
on the big endian target likely never worked. We deprecated these
non-working machine variants two releases ago, and so far nobody
complained, so it should be fine now to disable them. Hard-wire
the machines to little endian now.
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250515132019.569365-4-th...@redhat.com>
Commit: f9f1e39a62c83a318320d72df9cbed0d471300ce
https://github.com/qemu/qemu/commit/f9f1e39a62c83a318320d72df9cbed0d471300ce
Author: Thomas Huth <th...@redhat.com>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M docs/about/deprecated.rst
Log Message:
-----------
docs: Deprecate the qemu-system-microblazeel binary
The (former big-endian only) binary qemu-system-microblaze can
handle both endiannesses nowadays, so we don't need the separate
qemu-system-microblazeel binary for little endian anymore. Let's
deprecate it to avoid unnecessary compilation and test time in
the future.
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250515132019.569365-5-th...@redhat.com>
Commit: 92266f9e5e5056d1632bd6b49e42703ec42762ec
https://github.com/qemu/qemu/commit/92266f9e5e5056d1632bd6b49e42703ec42762ec
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
M tests/qtest/test-x86-cpuid-compat.c
Log Message:
-----------
hw/i386/pc: Remove deprecated pc-q35-2.4 and pc-i440fx-2.4 machines
These machines has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit
ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") they can now be removed.
Remove the qtest in test-x86-cpuid-compat.c file.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Thomas Huth <th...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-2-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: b222c00b15aba0c303585738ede695b1b16c9cd6
https://github.com/qemu/qemu/commit/b222c00b15aba0c303585738ede695b1b16c9cd6
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/i386/pc.c
M include/hw/i386/pc.h
Log Message:
-----------
hw/i386/pc: Remove PCMachineClass::broken_reserved_end field
The PCMachineClass::broken_reserved_end field was only used
by the pc-q35-2.4 and pc-i440fx-2.4 machines, which got removed.
Remove it and simplify pc_memory_init().
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Thomas Huth <th...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-3-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: ac74c0cabfaf37e2e2edfc03efbd1c8b13837b81
https://github.com/qemu/qemu/commit/ac74c0cabfaf37e2e2edfc03efbd1c8b13837b81
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/i386/pc.c
M include/hw/i386/pc.h
Log Message:
-----------
hw/i386/pc: Remove pc_compat_2_4[] array
The pc_compat_2_4[] array was only used by the pc-q35-2.4
and pc-i440fx-2.4 machines, which got removed. Remove it.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-4-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: 0b4c9d591504b10610ace17548e87d4d7dcfc23b
https://github.com/qemu/qemu/commit/0b4c9d591504b10610ace17548e87d4d7dcfc23b
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/core/machine.c
M include/hw/boards.h
Log Message:
-----------
hw/core/machine: Remove hw_compat_2_4[] array
The hw_compat_2_4[] array was only used by the pc-q35-2.4 and
pc-i440fx-2.4 machines, which got removed. Remove it.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-6-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: 7ab09a392e6f1d07884bf8e4fde869ffc4ae4ee2
https://github.com/qemu/qemu/commit/7ab09a392e6f1d07884bf8e4fde869ffc4ae4ee2
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/net/e1000.c
Log Message:
-----------
hw/net/e1000: Remove unused E1000_FLAG_MAC flag
E1000_FLAG_MAC was only used by the hw_compat_2_4[] array,
via the 'extra_mac_registers=off' property. We removed all
machines using that array, lets remove all the code around
E1000_FLAG_MAC, including the MAC_ACCESS_FLAG_NEEDED enum,
similarly to commit fa4ec9ffda7 ("e1000: remove old
compatibility code").
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Message-ID: <20250512083948.39294-7-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: 42b5aed650c1acfc87125cf6eab0176d67e84c21
https://github.com/qemu/qemu/commit/42b5aed650c1acfc87125cf6eab0176d67e84c21
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/virtio/virtio-pci.c
M include/hw/virtio/virtio-pci.h
Log Message:
-----------
hw/virtio/virtio-pci: Remove VIRTIO_PCI_FLAG_MIGRATE_EXTRA definition
VIRTIO_PCI_FLAG_MIGRATE_EXTRA was only used by the
hw_compat_2_4[] array, via the 'migrate-extra=true'
property. We removed all machines using that array,
lets remove all the code around VIRTIO_PCI_FLAG_MIGRATE_EXTRA.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Thomas Huth <th...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Message-ID: <20250512083948.39294-8-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: cc50ee42a9dfc8f884a47733e2fa3fb02486c8c7
https://github.com/qemu/qemu/commit/cc50ee42a9dfc8f884a47733e2fa3fb02486c8c7
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/virtio/virtio-pci.c
M include/hw/virtio/virtio-pci.h
Log Message:
-----------
hw/virtio/virtio-pci: Remove VIRTIO_PCI_FLAG_DISABLE_PCIE definition
VIRTIO_PCI_FLAG_DISABLE_PCIE was only used by the hw_compat_2_4[]
array, via the 'x-disable-pcie=false' property. We removed all
machines using that array, lets remove all the code around
VIRTIO_PCI_FLAG_DISABLE_PCIE (see commit 9a4c0e220d8 for similar
VIRTIO_PCI_FLAG_* enum removal).
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Thomas Huth <th...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-9-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: 387c7c0fd6c71a10c6b30d5a135c18f8f565afe4
https://github.com/qemu/qemu/commit/387c7c0fd6c71a10c6b30d5a135c18f8f565afe4
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/i386/pc.c
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
M include/hw/i386/pc.h
Log Message:
-----------
hw/i386/pc: Remove deprecated pc-q35-2.5 and pc-i440fx-2.5 machines
These machines has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit
ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") they can now be removed.
Remove the now unused empty pc_compat_2_5[] array.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-10-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: a4ca2109bd0f30941c2c47c9cc479cf9ad16e82e
https://github.com/qemu/qemu/commit/a4ca2109bd0f30941c2c47c9cc479cf9ad16e82e
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/i386/x86.c
M include/hw/i386/x86.h
M target/i386/machine.c
Log Message:
-----------
hw/i386/x86: Remove X86MachineClass::save_tsc_khz field
The X86MachineClass::save_tsc_khz boolean was only used
by the pc-q35-2.5 and pc-i440fx-2.5 machines, which got
removed. Remove it and simplify tsc_khz_needed().
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Thomas Huth <th...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-11-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: 225aa7c6bfd0b561906c4e2434980c113022926e
https://github.com/qemu/qemu/commit/225aa7c6bfd0b561906c4e2434980c113022926e
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/core/loader.c
M hw/i386/pc.c
M hw/nvram/fw_cfg.c
M include/hw/boards.h
M include/hw/loader.h
M include/hw/nvram/fw_cfg.h
M system/vl.c
Log Message:
-----------
hw/nvram/fw_cfg: Remove legacy FW_CFG_ORDER_OVERRIDE
The MachineClass::legacy_fw_cfg_order boolean was only used
by the pc-q35-2.5 and pc-i440fx-2.5 machines, which got
removed. Remove it along with:
- FW_CFG_ORDER_OVERRIDE_* definitions
- fw_cfg_set_order_override()
- fw_cfg_reset_order_override()
- fw_cfg_order[]
- rom_set_order_override()
- rom_reset_order_override()
Simplify CLI and pc_vga_init() / pc_nic_init().
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-12-phi...@linaro.org>
[thuth: Fix error from check_patch.pl wrt to an empty "for" loop]
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: 09ff5e5d220733f7b039f7f059b5d49fba549b89
https://github.com/qemu/qemu/commit/09ff5e5d220733f7b039f7f059b5d49fba549b89
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/core/machine.c
M include/hw/boards.h
Log Message:
-----------
hw/core/machine: Remove hw_compat_2_5[] array
The hw_compat_2_5[] array was only used by the pc-q35-2.5 and
pc-i440fx-2.5 machines, which got removed. Remove it.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-13-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: fe4c54594f6d2a23c81b442f5f8de95904a5a65e
https://github.com/qemu/qemu/commit/fe4c54594f6d2a23c81b442f5f8de95904a5a65e
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/scsi/vmw_pvscsi.c
Log Message:
-----------
hw/scsi/vmw_pvscsi: Remove PVSCSI_COMPAT_OLD_PCI_CONFIGURATION definition
PVSCSI_COMPAT_OLD_PCI_CONFIGURATION was only used by the
hw_compat_2_5[] array, via the 'x-old-pci-configuration=on'
property. We removed all machines using that array, lets remove
all the code around PVSCSI_COMPAT_OLD_PCI_CONFIGURATION.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Thomas Huth <th...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-15-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: 21495e483c23e6f974043e356f1cd53683c35f37
https://github.com/qemu/qemu/commit/21495e483c23e6f974043e356f1cd53683c35f37
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/scsi/vmw_pvscsi.c
Log Message:
-----------
hw/scsi/vmw_pvscsi: Remove PVSCSI_COMPAT_DISABLE_PCIE_BIT definition
PVSCSI_COMPAT_DISABLE_PCIE_BIT was only used by the
hw_compat_2_5[] array, via the 'x-disable-pcie=on' property.
We removed all machines using that array, lets remove all the
code around PVSCSI_COMPAT_DISABLE_PCIE_BIT, including the now
unused PVSCSIState::compat_flags field.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Thomas Huth <th...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-16-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: 8dfbe6993227a32d5abcfc3472d17d38bff1acdb
https://github.com/qemu/qemu/commit/8dfbe6993227a32d5abcfc3472d17d38bff1acdb
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/scsi/vmw_pvscsi.c
Log Message:
-----------
hw/scsi/vmw_pvscsi: Convert DeviceRealize -> InstanceInit
Simplify replacing pvscsi_realize() by pvscsi_instance_init(),
removing the need for device_class_set_parent_realize().
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-17-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: d5a652e7fb93a204e67a3f48a4c07381c0c3d845
https://github.com/qemu/qemu/commit/d5a652e7fb93a204e67a3f48a4c07381c0c3d845
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/net/vmxnet3.c
Log Message:
-----------
hw/net/vmxnet3: Remove VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS definition
VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS was only used by the
hw_compat_2_5[] array, via the 'x-old-msi-offsets=on' property.
We removed all machines using that array, lets remove all the
code around VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-18-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: 622f963bed98ff785bb939db48e0016ca49a14bd
https://github.com/qemu/qemu/commit/622f963bed98ff785bb939db48e0016ca49a14bd
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/net/vmxnet3.c
Log Message:
-----------
hw/net/vmxnet3: Remove VMXNET3_COMPAT_FLAG_DISABLE_PCIE definition
VMXNET3_COMPAT_FLAG_DISABLE_PCIE was only used by the
hw_compat_2_5[] array, via the 'x-disable-pcie=on' property.
We removed all machines using that array, lets remove all the
code around VMXNET3_COMPAT_FLAG_DISABLE_PCIE.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-19-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: 5df3b6b08057e088b6576767a629674d1bd6901d
https://github.com/qemu/qemu/commit/5df3b6b08057e088b6576767a629674d1bd6901d
Author: Philippe Mathieu-Daudé <phi...@linaro.org>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M hw/net/vmxnet3.c
Log Message:
-----------
hw/net/vmxnet3: Merge DeviceRealize in InstanceInit
Simplify merging vmxnet3_realize() within vmxnet3_instance_init(),
removing the need for device_class_set_parent_realize().
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Message-ID: <20250512083948.39294-20-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: 51c214b7c27096e3516aedf6befd69dc6d75b4ac
https://github.com/qemu/qemu/commit/51c214b7c27096e3516aedf6befd69dc6d75b4ac
Author: Matheus Tavares Bernardino <matheus.bernard...@oss.qualcomm.com>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M tests/unit/test-util-sockets.c
Log Message:
-----------
tests/unit/test-util-sockets: fix mem-leak on error object
The test fails with --enable-asan as the error struct is never freed.
In the case where the test expects a success but it fails, let's also
report the error for debugging (it will be freed internally).
Fixes 316e8ee8d6 ("util/qemu-sockets: Refactor inet_parse() to use QemuOpts")
Signed-off-by: Matheus Tavares Bernardino <matheus.bernard...@oss.qualcomm.com>
Reviewed-by: Juraj Marcin <jmar...@redhat.com>
Message-ID:
<518d94c7db20060b2a086cf55ee9bffab992a907.1748280011.git.matheus.bernard...@oss.qualcomm.com>
Signed-off-by: Thomas Huth <th...@redhat.com>
Commit: 12c16cb58d6cdeedc16488ce07b2e4b5b8b6be49
https://github.com/qemu/qemu/commit/12c16cb58d6cdeedc16488ce07b2e4b5b8b6be49
Author: Stefan Hajnoczi <stefa...@redhat.com>
Date: 2025-05-29 (Thu, 29 May 2025)
Changed paths:
M docs/about/deprecated.rst
M docs/about/removed-features.rst
M hw/core/loader.c
M hw/core/machine.c
M hw/i386/pc.c
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
M hw/i386/x86.c
M hw/microblaze/petalogix_ml605_mmu.c
M hw/microblaze/petalogix_s3adsp1800_mmu.c
M hw/microblaze/xlnx-zynqmp-pmu.c
M hw/net/e1000.c
M hw/net/vmxnet3.c
M hw/nvram/fw_cfg.c
M hw/scsi/vmw_pvscsi.c
M hw/virtio/virtio-pci.c
M include/hw/boards.h
M include/hw/i386/pc.h
M include/hw/i386/x86.h
M include/hw/loader.h
M include/hw/nvram/fw_cfg.h
M include/hw/virtio/virtio-pci.h
M system/vl.c
M target/i386/machine.c
M tests/functional/test_mem_addr_space.py
M tests/functional/test_microblaze_s3adsp1800.py
M tests/functional/test_microblazeel_s3adsp1800.py
M tests/functional/test_mips_malta.py
M tests/functional/test_sparc64_tuxrun.py
M tests/qtest/test-x86-cpuid-compat.c
M tests/unit/test-util-sockets.c
Log Message:
-----------
Merge tag 'pull-request-2025-05-28v2' of https://gitlab.com/thuth/qemu into
staging
* Functional tests improvements
* Endianness improvements/clean-ups for the Microblaze machines
* Remove obsolete -2.4 and -2.5 i440fx and q35 machine types and related code
# -----BEGIN PGP SIGNATURE-----
#
# iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmg3cDkRHHRodXRoQHJl
# ZGhhdC5jb20ACgkQLtnXdP5wLbWNSQ/+Ne/gqUAQhIziGHe/x3oZ1eg19v2HDpvg
# VpJAdMzWwqTRwPwQeQt6OyU7o/2kmY65zYlFx6BXN+k0xaCY4kY1aQ4k8zvfMrmB
# ERaiLGbr69z52FvOdutLuBcr566vM1qQlGHW57C4kVkqJmyGUiODsJW4h8d6aKiP
# QZBiEnFtYhFOvUInJnYhs+oSFManPhm+86EJSE2q/B09n3bXKlwdq6Z8zhL/t9e+
# +9iqth0SM7L3V17LIveGpozKKIhaLfpb9PeMVpx/6Oej3VVyb6lDg5RnG48Y5fSA
# ICcj02Oq8+SY1PVwAyW3NXzxCo/0xVKuUAz/TGswgICpVNrGHtLf6sMjSK2Uhwtf
# nJoFYuDHcKv58kqm5XCkyrDot6OvOf7bD0znITTo5W/w5QLXjZNMfqnrR26CThgz
# 11cx8ifLQlyF8+Ekqp9FTfcAkqjnCWAe08cHyGXOETOuCMp8S7RWjNC6SMkyjhdJ
# WjfwrhoAJKFAmPh3WLQgIcZfIANhO967doKGgiyJQGUieLEbb8Pw89CAT+AKqtG5
# 9YCCqimUnJycq9cl9N/zaswiHSnJds6DV75ygebtlqPXb4NMQYRT85Mjat6pyekh
# HpENDnScnyEhljI/5HL6oq4GPohiTqQmvkuEsyi9PxnN71ZQsxiOhNb4TSo36XHH
# ARDeVBXhoS4=
# =v28a
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 28 May 2025 16:21:13 EDT
# gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "th...@redhat.com"
# gpg: Good signature from "Thomas Huth <th.h...@gmx.de>" [full]
# gpg: aka "Thomas Huth <th...@redhat.com>" [full]
# gpg: aka "Thomas Huth <h...@tuxfamily.org>" [full]
# gpg: aka "Thomas Huth <th.h...@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2025-05-28v2' of https://gitlab.com/thuth/qemu: (25 commits)
tests/unit/test-util-sockets: fix mem-leak on error object
hw/net/vmxnet3: Merge DeviceRealize in InstanceInit
hw/net/vmxnet3: Remove VMXNET3_COMPAT_FLAG_DISABLE_PCIE definition
hw/net/vmxnet3: Remove VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS definition
hw/scsi/vmw_pvscsi: Convert DeviceRealize -> InstanceInit
hw/scsi/vmw_pvscsi: Remove PVSCSI_COMPAT_DISABLE_PCIE_BIT definition
hw/scsi/vmw_pvscsi: Remove PVSCSI_COMPAT_OLD_PCI_CONFIGURATION definition
hw/core/machine: Remove hw_compat_2_5[] array
hw/nvram/fw_cfg: Remove legacy FW_CFG_ORDER_OVERRIDE
hw/i386/x86: Remove X86MachineClass::save_tsc_khz field
hw/i386/pc: Remove deprecated pc-q35-2.5 and pc-i440fx-2.5 machines
hw/virtio/virtio-pci: Remove VIRTIO_PCI_FLAG_DISABLE_PCIE definition
hw/virtio/virtio-pci: Remove VIRTIO_PCI_FLAG_MIGRATE_EXTRA definition
hw/net/e1000: Remove unused E1000_FLAG_MAC flag
hw/core/machine: Remove hw_compat_2_4[] array
hw/i386/pc: Remove pc_compat_2_4[] array
hw/i386/pc: Remove PCMachineClass::broken_reserved_end field
hw/i386/pc: Remove deprecated pc-q35-2.4 and pc-i440fx-2.4 machines
docs: Deprecate the qemu-system-microblazeel binary
hw/microblaze: Remove the big-endian variants of ml605 and xlnx-zynqmp-pmu
...
Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com>
Compare: https://github.com/qemu/qemu/compare/d2e9b78162e3...12c16cb58d6c
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