Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 51eb283dd0e29f29adf1943c063614156ca7cbd7
      
https://github.com/qemu/qemu/commit/51eb283dd0e29f29adf1943c063614156ca7cbd7
  Author: Jackson Donaldson <jackson88...@gmail.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M hw/arm/Kconfig
    A hw/arm/max78000_soc.c
    A hw/arm/max78000fthr.c
    M hw/arm/meson.build
    A include/hw/arm/max78000_soc.h

  Log Message:
  -----------
  MAX78000: Add MAX78000FTHR Machine

This patch adds support for the MAX78000FTHR machine.

The MAX78000FTHR contains a MAX78000 and a RISC-V core. This patch
implements only the MAX78000, which is Cortex-M4 based.
Details can be found at:
https://www.analog.com/media/en/technical-documentation/user-guides/max78000-user-guide.pdf

Signed-off-by: Jackson Donaldson <jc...@duck.com>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250704223239.248781-2-jc...@duck.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 3ec680e64c6d0686c518f25fdadf8866d7cd12a1
      
https://github.com/qemu/qemu/commit/3ec680e64c6d0686c518f25fdadf8866d7cd12a1
  Author: Jackson Donaldson <jackson88...@gmail.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M hw/arm/Kconfig
    M hw/misc/Kconfig
    A hw/misc/max78000_icc.c
    M hw/misc/meson.build
    A include/hw/misc/max78000_icc.h

  Log Message:
  -----------
  MAX78000: ICC Implementation

This commit implements the Instruction Cache Controller
for the MAX78000

Signed-off-by: Jackson Donaldson <jc...@duck.com>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250704223239.248781-3-jc...@duck.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 65714d3e6c384956537c43ee9a58f2e4ebfdd883
      
https://github.com/qemu/qemu/commit/65714d3e6c384956537c43ee9a58f2e4ebfdd883
  Author: Jackson Donaldson <jackson88...@gmail.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M hw/arm/max78000_soc.c
    M include/hw/arm/max78000_soc.h

  Log Message:
  -----------
  MAX78000: Add ICC to SOC

This commit adds the instruction cache controller
to max78000_soc

Signed-off-by: Jackson Donaldson <jc...@duck.com>
Reviewed-by: Peter Maydell <petermayd...@linaro.org>
Message-id: 20250704223239.248781-4-jc...@duck.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: d447e4b70295bb7a11715230f56ccea7d8b3b797
      
https://github.com/qemu/qemu/commit/d447e4b70295bb7a11715230f56ccea7d8b3b797
  Author: Jackson Donaldson <jackson88...@gmail.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M hw/arm/Kconfig
    M hw/char/Kconfig
    A hw/char/max78000_uart.c
    M hw/char/meson.build
    A include/hw/char/max78000_uart.h

  Log Message:
  -----------
  MAX78000: UART Implementation

This commit implements UART support for the MAX78000

Signed-off-by: Jackson Donaldson <jc...@duck.com>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250704223239.248781-5-jc...@duck.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: a670bb8a729945117fc0e8b357e02a311945cb74
      
https://github.com/qemu/qemu/commit/a670bb8a729945117fc0e8b357e02a311945cb74
  Author: Jackson Donaldson <jackson88...@gmail.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M hw/arm/max78000_soc.c
    M include/hw/arm/max78000_soc.h

  Log Message:
  -----------
  MAX78000: Add UART to SOC

This commit adds UART to max78000_soc

Signed-off-by: Jackson Donaldson <jc...@duck.com>
Reviewed-by: Peter Maydell <petermayd...@linaro.org>
Message-id: 20250704223239.248781-6-jc...@duck.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: a017f53e093a9018e33fb33bbdaa322c2de3dbe7
      
https://github.com/qemu/qemu/commit/a017f53e093a9018e33fb33bbdaa322c2de3dbe7
  Author: Jackson Donaldson <jackson88...@gmail.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M hw/arm/Kconfig
    M hw/misc/Kconfig
    A hw/misc/max78000_gcr.c
    M hw/misc/meson.build
    A include/hw/misc/max78000_gcr.h

  Log Message:
  -----------
  MAX78000: GCR Implementation

This commit implements the Global Control Register
for the MAX78000

Signed-off-by: Jackson Donaldson <jc...@duck.com>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250704223239.248781-7-jc...@duck.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 035a38fa97d07b80ff5b9fa6c3da43528770899d
      
https://github.com/qemu/qemu/commit/035a38fa97d07b80ff5b9fa6c3da43528770899d
  Author: Jackson Donaldson <jackson88...@gmail.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M hw/arm/max78000_soc.c
    M include/hw/arm/max78000_soc.h

  Log Message:
  -----------
  MAX78000: Add GCR to SOC

This commit adds the Global Control Register to
max78000_soc

Signed-off-by: Jackson Donaldson <jc...@duck.com>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250704223239.248781-8-jc...@duck.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 069852d159a18219eb19281b146d612849a84e03
      
https://github.com/qemu/qemu/commit/069852d159a18219eb19281b146d612849a84e03
  Author: Jackson Donaldson <jackson88...@gmail.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M hw/arm/Kconfig
    M hw/misc/Kconfig
    M hw/misc/max78000_gcr.c
    A hw/misc/max78000_trng.c
    M hw/misc/meson.build
    M include/hw/misc/max78000_gcr.h
    A include/hw/misc/max78000_trng.h

  Log Message:
  -----------
  MAX78000: TRNG Implementation

This commit implements the True Random Number
Generator for the MAX78000

Signed-off-by: Jackson Donaldson <jc...@duck.com>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250704223239.248781-9-jc...@duck.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 5adeb160322ff827f3e81f38e9481fb4896670e8
      
https://github.com/qemu/qemu/commit/5adeb160322ff827f3e81f38e9481fb4896670e8
  Author: Jackson Donaldson <jackson88...@gmail.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M hw/arm/max78000_soc.c
    M include/hw/arm/max78000_soc.h

  Log Message:
  -----------
  MAX78000: Add TRNG to SOC

This commit adds TRNG to max78000_soc

Signed-off-by: Jackson Donaldson
Message-id: 20250704223239.248781-10-jc...@duck.com
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 33dfff7e3405e9c7e877556d5f7050da4af0304f
      
https://github.com/qemu/qemu/commit/33dfff7e3405e9c7e877556d5f7050da4af0304f
  Author: Jackson Donaldson <jackson88...@gmail.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M hw/arm/Kconfig
    M hw/misc/Kconfig
    A hw/misc/max78000_aes.c
    M hw/misc/max78000_gcr.c
    M hw/misc/meson.build
    A include/hw/misc/max78000_aes.h
    M include/hw/misc/max78000_gcr.h

  Log Message:
  -----------
  MAX78000: AES implementation

This commit implements AES for the MAX78000

Signed-off-by: Jackson Donaldson <jc...@duck.com>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250704223239.248781-11-jc...@duck.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 4b3a1eb0664db2df02ff4f8affe6e7bda1edaa85
      
https://github.com/qemu/qemu/commit/4b3a1eb0664db2df02ff4f8affe6e7bda1edaa85
  Author: Jackson Donaldson <jackson88...@gmail.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M hw/arm/max78000_soc.c
    M include/hw/arm/max78000_soc.h

  Log Message:
  -----------
  MAX78000: Add AES to SOC

This commit adds AES to max78000_soc

Signed-off-by: Jackson Donaldson <jc...@duck.com>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250704223239.248781-12-jc...@duck.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 35566583d86e167b617f0b55e485fc4ef1ae5dc3
      
https://github.com/qemu/qemu/commit/35566583d86e167b617f0b55e485fc4ef1ae5dc3
  Author: Jonathan Cameron <jonathan.came...@huawei.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M hw/cxl/cxl-host.c
    M include/hw/cxl/cxl.h

  Log Message:
  -----------
  hw/cxl-host: Add an index field to CXLFixedMemoryWindow

To enable these to be found in a fixed order, that order needs to be known.
This will later be used to sort a list of these structures so that address
map and ACPI table entries are predictable.

Tested-by: Li Zhijian <lizhij...@fujitsu.com>
Reviewed-by: Li Zhijian <lizhij...@fujitsu.com>
Reviewed-by: Fan Ni <fan...@samsung.com>
Reviewed-by: Eric Auger <eric.au...@redhat.com>
Signed-off-by: Jonathan Cameron <jonathan.came...@huawei.com>
Tested-by: Itaru Kitayama <itaru.kitay...@fujitsu.com>
Message-id: 20250703104110.992379-2-jonathan.came...@huawei.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 584f722eb3ab4896ce9e3913c49f4f22e8b51f2b
      
https://github.com/qemu/qemu/commit/584f722eb3ab4896ce9e3913c49f4f22e8b51f2b
  Author: Jonathan Cameron <jonathan.came...@huawei.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M hw/acpi/cxl.c
    M hw/cxl/cxl-host-stubs.c
    M hw/cxl/cxl-host.c
    M hw/i386/pc.c
    M include/hw/cxl/cxl.h
    M include/hw/cxl/cxl_host.h

  Log Message:
  -----------
  hw/cxl: Make the CXL fixed memory windows devices.

Previously these somewhat device like structures were tracked using a list
in the CXLState in each machine. This is proving restrictive in a few
cases where we need to iterate through these without being aware of the
machine type. Just make them sysbus devices.

Restrict them to not user created as they need to be visible to early
stages of machine init given effects on the memory map.

This change both simplifies state tracking and enables features needed
for performance optimization and hotness tracking by making it possible
to retrieve the fixed memory window on actions elsewhere in the topology.

In some cases the ordering of the Fixed Memory Windows matters.
For those utility functions provide a GSList sorted by the window index.
This ensures that we get consistency across:
- ordering in the command line
- ordering of the host PA ranges
- ordering of ACPI CEDT structures describing the CFMWS.

Other aspects don't have this constraint. For those direct iteration
of the underlying hash structures is fine.

In the setup path for the memory map in pc_memory_init() split the
operations into two calls. The first, cxl_fmws_set_mmemap(), loops over
fixed memory windows in order and assigns their addresses.  The second,
cxl_fmws_update_mmio() actually sets up the mmio for each window.
This is obviously less efficient than a single loop but this split design
is needed to put the logic in two different places in the arm64 support
and it is not a hot enough path to justify an x86 only implementation.

Reviewed-by: Li Zhijian <lizhij...@fujitsu.com>
Tested-by: Li Zhijian <lizhij...@fujitsu.com>
Signed-off-by: Jonathan Cameron <jonathan.came...@huawei.com>
Tested-by: Itaru Kitayama <itaru.kitay...@fujitsu.com>
Message-id: 20250703104110.992379-3-jonathan.came...@huawei.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 9d8ade51a20d15f3be70c821c274b081ba65cea8
      
https://github.com/qemu/qemu/commit/9d8ade51a20d15f3be70c821c274b081ba65cea8
  Author: Jonathan Cameron <jonathan.came...@huawei.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M docs/system/arm/virt.rst
    M hw/arm/virt-acpi-build.c
    M hw/arm/virt.c
    M include/hw/arm/virt.h

  Log Message:
  -----------
  hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxl

Code based on i386/pc enablement.
The memory layout places space for 16 host bridge register regions after
the GIC_REDIST2 in the extended memmap. This is a hole in the current
map so adding them here has no impact on placement of other memory regions
(tested with enough CPUs for GIC_REDIST2 to be in use.)
The high memory map is GiB aligned so the hole is there whatever the
size of memory or device_memory below this point.

The CFMWs are placed above the extended memmap. Note the existing
variable highest_gpa is the highest GPA that has been allocated at
a particular point in setting up the memory map. Whilst this caused
some confusion in review there are existing comments explaining this
so nothing is added.

The cxl_devices_state.host_mr provides a small space in which to place
the individual host bridge register regions for whatever host bridges are
allocated via -device pxb-cxl on the command line. The existing dynamic
sysbus infrastructure is not reused because pxb-cxl is a PCI device not
a sysbus one but these registers are directly in the main memory map,
not the PCI address space.

Only create the CEDT table if cxl=on set for the machine. Default to off.

Signed-off-by: Jonathan Cameron <jonathan.came...@huawei.com>
Tested-by: Itaru Kitayama <itaru.kitay...@fujitsu.com>
Tested-by: Li Zhijian <lizhij...@fujitsu.com>
Message-id: 20250703104110.992379-4-jonathan.came...@huawei.com
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 3fd8426aefa946ac6ab86103f68c9b526a0de237
      
https://github.com/qemu/qemu/commit/3fd8426aefa946ac6ab86103f68c9b526a0de237
  Author: Jonathan Cameron <jonathan.came...@huawei.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M docs/system/devices/cxl.rst

  Log Message:
  -----------
  docs/cxl: Add an arm/virt example.

Only add one very simple example as all the i386/pc examples will work
for arm/virt with a change to appropriate executable and appropriate
standard launch line for arm/virt. Note that max cpu is used to
ensure we have plenty of physical address space.

Suggested-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Eric Auger <eric.au...@redhat.com>
Signed-off-by: Jonathan Cameron <jonathan.came...@huawei.com>
Tested-by: Itaru Kitayama <itaru.kitay...@fujitsu.com>
Tested-by: Li Zhijian <lizhij...@fujitsu.com>
Message-id: 20250703104110.992379-5-jonathan.came...@huawei.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 67fe3c8a73876ff727f301a306a03eb3230b58ee
      
https://github.com/qemu/qemu/commit/67fe3c8a73876ff727f301a306a03eb3230b58ee
  Author: Jonathan Cameron <jonathan.came...@huawei.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M tests/qtest/cxl-test.c
    M tests/qtest/meson.build

  Log Message:
  -----------
  qtest/cxl: Add aarch64 virt test for CXL

Add a single complex case for aarch64 virt machine.

Given existing much more comprehensive tests for x86 cover the common
functionality, a single test should be enough to verify that the aarch64
part continues to work.

Tested-by: Itaru Kitayama <itaru.kitay...@fujitsu.com>
Reviewed-by: Eric Auger <eric.au...@redhat.com>
Signed-off-by: Jonathan Cameron <jonathan.came...@huawei.com>
Tested-by: Li Zhijian <lizhij...@fujitsu.com>
Message-id: 20250703104110.992379-6-jonathan.came...@huawei.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 1fea334eeed2b747d1c91ee0099401595ba697f8
      
https://github.com/qemu/qemu/commit/1fea334eeed2b747d1c91ee0099401595ba697f8
  Author: Cornelia Huck <coh...@redhat.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M hw/intc/armv7m_nvic.c
    M target/arm/cpu-sysregs.h.inc
    M target/arm/cpu.h
    M target/arm/cpu64.c
    M target/arm/helper.c
    M target/arm/tcg/cpu-v7m.c
    M target/arm/tcg/cpu32.c
    M target/arm/tcg/cpu64.c

  Log Message:
  -----------
  arm/cpu: store id_afr0 into the idregs array

Signed-off-by: Cornelia Huck <coh...@redhat.com>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Eric Auger <eric.au...@redhat.com>
Message-id: 20250704141927.38963-2-coh...@redhat.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: a7e1c62d075d48f0d05e5758471d9caf97e330df
      
https://github.com/qemu/qemu/commit/a7e1c62d075d48f0d05e5758471d9caf97e330df
  Author: Cornelia Huck <coh...@redhat.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M target/arm/cpu-sysregs.h.inc
    M target/arm/cpu.h
    M target/arm/helper.c
    M target/arm/tcg/cpu64.c

  Log Message:
  -----------
  arm/cpu: store id_aa64afr{0,1} into the idregs array

Signed-off-by: Cornelia Huck <coh...@redhat.com>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Eric Auger <eric.au...@redhat.com>
Message-id: 20250704141927.38963-3-coh...@redhat.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: e61aa4a5ffb5e849a25454c3f5fa1ae1b036bb29
      
https://github.com/qemu/qemu/commit/e61aa4a5ffb5e849a25454c3f5fa1ae1b036bb29
  Author: Cornelia Huck <coh...@redhat.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M target/arm/tcg/cpu64.c

  Log Message:
  -----------
  arm/cpu: fix trailing ',' for SET_IDREG

While a trailing comma is not broken for SET_IDREG invocations, it
does look odd; use a semicolon instead.

Fixes: f1fd81291c91 ("arm/cpu: Store aa64mmfr0-3 into the idregs array")
Fixes: def3f1c1026a ("arm/cpu: Store aa64dfr0/1 into the idregs array")
Signed-off-by: Cornelia Huck <coh...@redhat.com>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Eric Auger <eric.au...@redhat.com>
Message-id: 20250704141927.38963-4-coh...@redhat.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: f73632932bf19788dfd0ff406c2a8fe98e827c14
      
https://github.com/qemu/qemu/commit/f73632932bf19788dfd0ff406c2a8fe98e827c14
  Author: Cornelia Huck <coh...@redhat.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M hw/intc/armv7m_nvic.c
    M target/arm/cpu-sysregs.h.inc
    M target/arm/cpu.h
    M target/arm/cpu64.c
    M target/arm/helper.c
    M target/arm/tcg/cpu-v7m.c
    M target/arm/tcg/cpu32.c
    M target/arm/tcg/cpu64.c

  Log Message:
  -----------
  arm/cpu: store clidr into the idregs array

Signed-off-by: Cornelia Huck <coh...@redhat.com>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Eric Auger <eric.au...@redhat.com>
Message-id: 20250704141927.38963-5-coh...@redhat.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 3f1772cbdc152125d84d2f6e75ec06799a498b4e
      
https://github.com/qemu/qemu/commit/3f1772cbdc152125d84d2f6e75ec06799a498b4e
  Author: Cornelia Huck <coh...@redhat.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M target/arm/kvm.c

  Log Message:
  -----------
  arm/kvm: shorten one overly long line

Fixes: 804cfc7eedb7 ("arm/cpu: Store aa64isar0/aa64zfr0 into the idregs arrays")
Signed-off-by: Cornelia Huck <coh...@redhat.com>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Eric Auger <eric.au...@redhat.com>
Tested-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-id: 20250704141927.38963-6-coh...@redhat.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: dcef48a56556235578b9e4ea3b4a13e01d9d95e8
      
https://github.com/qemu/qemu/commit/dcef48a56556235578b9e4ea3b4a13e01d9d95e8
  Author: Richard Henderson <richard.hender...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M target/arm/helper.c
    M target/arm/tcg-stubs.c

  Log Message:
  -----------
  target/arm: Drop stub for define_tlb_insn_regs

Allow the call to be compiled out by protecting it
with tcg_enabled.

Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-id: 20250707151547.196393-2-richard.hender...@linaro.org
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: a62fa0c7a00fab51459c68986e9259c389f1e5d6
      
https://github.com/qemu/qemu/commit/a62fa0c7a00fab51459c68986e9259c389f1e5d6
  Author: Richard Henderson <richard.hender...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M target/arm/helper.c
    M target/arm/internals.h
    A target/arm/tcg/cpregs-at.c
    M target/arm/tcg/meson.build

  Log Message:
  -----------
  target/arm: Split out AT insns to tcg/cpregs-at.c

Split out all "system instructions for address translation".
While mapped into "cpregs", these are instructions, and thus
are handled in hardware by virtualization.  They are all
priviledged, and thus not reachable for user-only.

Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-id: 20250707151547.196393-3-richard.hender...@linaro.org
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: ae2086426d3784cf66e5b0b7ac823c08e87b4c57
      
https://github.com/qemu/qemu/commit/ae2086426d3784cf66e5b0b7ac823c08e87b4c57
  Author: Richard Henderson <richard.hender...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    A target/arm/cpregs-pmu.c
    M target/arm/cpregs.h
    M target/arm/helper.c
    M target/arm/internals.h
    M target/arm/meson.build

  Log Message:
  -----------
  target/arm: Split out performance monitor regs to cpregs-pmu.c

Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-id: 20250707151547.196393-4-richard.hender...@linaro.org
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: c563cd7e61d074f58eef413322144461dd243716
      
https://github.com/qemu/qemu/commit/c563cd7e61d074f58eef413322144461dd243716
  Author: Peter Maydell <peter.mayd...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M target/arm/tcg/helper-a64.c

  Log Message:
  -----------
  target/arm: Don't enforce NSE,NS check for EL3->EL3 returns

In the Arm ARM, rule R_TYTWB that defines illegal exception return cases
includes the case:
 If FEAT_RME is implemented, then if SCR_EL3.{NSE, NS} is {1, 0}, an
 exception return from EL3 to a lower Exception level

Our implementation of this check fails to check that the
return is to a lower exception level, so it will incorrectly fire on
EL3->EL3 exception returns.

Fix the check condition. This requires us to move it further
down in the function to a point where we know the new_el value.

Fixes: 35aa6715ddcd9 ("target/arm: Catch illegal-exception-return from EL3 with 
bad NSE/NS")
Cc: qemu-sta...@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3016
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-id: 20250704165636.261888-1-peter.mayd...@linaro.org


  Commit: 930180f3b9a292639eb894f1ca846683834ed4b7
      
https://github.com/qemu/qemu/commit/930180f3b9a292639eb894f1ca846683834ed4b7
  Author: Bernhard Beschow <shen...@gmail.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M hw/arm/fsl-imx8mp.c

  Log Message:
  -----------
  hw/arm/fsl-imx8mp: Wire VIRQ and VFIQ

Allows to run KVM guests inside the imx8mp-evk machine.

Fixes: a4eefc69b237 ("hw/arm: Add i.MX 8M Plus EVK board")
CC: qemu-stable
Signed-off-by: Bernhard Beschow <shen...@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 66ba6d1367d7e81d705430ff611af01280953992
      
https://github.com/qemu/qemu/commit/66ba6d1367d7e81d705430ff611af01280953992
  Author: Haibo Xu <haibo...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M hw/arm/virt.c
    M hw/intc/arm_gicv3_common.c
    M hw/intc/arm_gicv3_kvm.c
    M include/hw/intc/arm_gicv3_common.h

  Log Message:
  -----------
  hw/arm: Allow setting KVM vGIC maintenance IRQ

Allow virt arm machine to set the interrupt ID for the KVM
GIC maintenance interrupt.

This setting must be done before the KVM_DEV_ARM_VGIC_CTRL_INIT
hence the choice to perform the setting in the GICv3 realize
instead of proceeding the same way as kvm_arm_pmu_set_irq().

Signed-off-by: Haibo Xu <haibo...@linaro.org>
Signed-off-by: Miguel Luis <miguel.l...@oracle.com>
Signed-off-by: Eric Auger <eric.au...@redhat.com>
Message-id: 20250707164129.1167837-2-eric.au...@redhat.com
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 776aac5653cd9b072c735fcd65a3e58bd59370f4
      
https://github.com/qemu/qemu/commit/776aac5653cd9b072c735fcd65a3e58bd59370f4
  Author: Haibo Xu <haibo...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M target/arm/kvm-stub.c
    M target/arm/kvm.c
    M target/arm/kvm_arm.h

  Log Message:
  -----------
  target/arm/kvm: Add helper to detect EL2 when using KVM

Introduce query support for KVM_CAP_ARM_EL2.

Signed-off-by: Haibo Xu <haibo...@linaro.org>
Signed-off-by: Miguel Luis <miguel.l...@oracle.com>
Signed-off-by: Eric Auger <eric.au...@redhat.com>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-id: 20250707164129.1167837-3-eric.au...@redhat.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 4ee1efc9871936e2561212e409ad094c2ae83cad
      
https://github.com/qemu/qemu/commit/4ee1efc9871936e2561212e409ad094c2ae83cad
  Author: Haibo Xu <haibo...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M target/arm/kvm.c

  Log Message:
  -----------
  target/arm: Enable feature ARM_FEATURE_EL2 if EL2 is supported

KVM_CAP_ARM_EL2 must be supported by the cpu to enable ARM_FEATURE_EL2.
In case the host does support NV, expose the feature.

Signed-off-by: Haibo Xu <haibo...@linaro.org>
Signed-off-by: Miguel Luis <miguel.l...@oracle.com>
Signed-off-by: Eric Auger <eric.au...@redhat.com>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-id: 20250707164129.1167837-4-eric.au...@redhat.com
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: f36032440f5dd7ceb90833dd44600363b1472757
      
https://github.com/qemu/qemu/commit/f36032440f5dd7ceb90833dd44600363b1472757
  Author: Eric Auger <eric.au...@redhat.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M hw/intc/arm_gicv3_kvm.c

  Log Message:
  -----------
  hw/arm/arm_gicv3_kvm: Add a migration blocker with kvm nested virt

We may be miss some NV related GIC register save/restore. Until
we complete the study, let's add a migration blocker when the
maintenance IRQ is set.

Signed-off-by: Eric Auger <eric.au...@redhat.com>
Message-id: 20250707164129.1167837-5-eric.au...@redhat.com
Suggested-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 851dcb8355cb3c37fbbf8cc99ae5fac4871d1a44
      
https://github.com/qemu/qemu/commit/851dcb8355cb3c37fbbf8cc99ae5fac4871d1a44
  Author: Peter Maydell <peter.mayd...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  hw/arm/virt: Allow virt extensions with KVM

Up to now virt support on guest has been only supported with TCG.
Now it becomes feasible to use it with KVM acceleration.

Check neither in-kernel GICv3 nor aarch64=off is used along with KVM
EL2.

Signed-off-by: Haibo Xu <haibo...@linaro.org>
Signed-off-by: Miguel Luis <miguel.l...@oracle.com>
Signed-off-by: Eric Auger <eric.au...@redhat.com>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-id: 20250707164129.1167837-6-eric.au...@redhat.com
[PMM: make "kernel doesn't have EL2 support" error message
 distinct from the old "QEMU doesn't have KVM EL2 support" one]
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 677bb509bfbe5f94bb15a62d8490cbad89aa9b94
      
https://github.com/qemu/qemu/commit/677bb509bfbe5f94bb15a62d8490cbad89aa9b94
  Author: Philippe Mathieu-Daudé <phi...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M system/qdev-monitor.c

  Log Message:
  -----------
  system/qdev: Remove pointless NULL check in qdev_device_add_from_qdict

Coverity reported a unnecessary NULL check:

  qemu/system/qdev-monitor.c: 720 in qdev_device_add_from_qdict()
  683     /* create device */
  684     dev = qdev_new(driver);
  ...
  719     err_del_dev:
  >>>     CID 1590192:  Null pointer dereferences  (REVERSE_INULL)
  >>>     Null-checking "dev" suggests that it may be null, but it has already 
been dereferenced on all paths leading to the check.
  720         if (dev) {
  721             object_unparent(OBJECT(dev));
  722             object_unref(OBJECT(dev));
  723         }
  724         return NULL;
  725     }

Indeed, unlike qdev_try_new() which can return NULL,
qdev_new() always returns a heap pointer (or aborts).

Remove the unnecessary assignment and check.

Fixes: f3a85056569 ("qdev/qbus: add hidden device support")
Resolves: Coverity CID 1590192 (Null pointer dereferences)
Suggested-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 47a4f6a900e1d0764cb973b7140f471859de4128
      
https://github.com/qemu/qemu/commit/47a4f6a900e1d0764cb973b7140f471859de4128
  Author: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M hw/arm/virt-acpi-build.c

  Log Message:
  -----------
  hw/arm/virt-acpi-build: Don't create ITS id mappings by default

Commit d6afe18b7242 ("hw/arm/virt-acpi-build: Fix ACPI IORT and MADT tables
when its=off") moved ITS group node generation under the its=on condition.
However, it still creates rc_its_idmaps unconditionally, which results in
duplicate ID mappings in the IORT table.

Fixes:d6afe18b7242 ("hw/arm/virt-acpi-build: Fix ACPI IORT and MADT tables when 
its=off")
Reviewed-by: Jonathan Cameron <jonathan.came...@huawei.com>
Reviewed-by: Eric Auger <eric.au...@redhat.com>
Reviewed-by: Donald Dutile <ddut...@redhat.com>
Tested-by: Eric Auger <eric.au...@redhat.com>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: abbeb42c1762a529cfbae52845c279b648a7acb4
      
https://github.com/qemu/qemu/commit/abbeb42c1762a529cfbae52845c279b648a7acb4
  Author: Richard Henderson <richard.hender...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M fpu/softfloat-parts.c.inc
    M fpu/softfloat.c
    M tests/tcg/multiarch/Makefile.target
    A tests/tcg/multiarch/fnmsub.c

  Log Message:
  -----------
  fpu: Process float_muladd_negate_result after rounding

Changing the sign before rounding affects the correctness of
the asymmetric rouding modes: float_round_up and float_round_down.

Reported-by: WANG Rui <wang...@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: 6a3e132a1be8c9e649967a4eb341d00731be7f51
      
https://github.com/qemu/qemu/commit/6a3e132a1be8c9e649967a4eb341d00731be7f51
  Author: Peter Maydell <peter.mayd...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M linux-user/syscall.c

  Log Message:
  -----------
  linux-user: Implement fchmodat2 syscall

The fchmodat2 syscall is new from Linux 6.6; it is like the
existing fchmodat syscall except that it takes a flags parameter.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3019
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-ID: <20250710113123.1109461-1-peter.mayd...@linaro.org>


  Commit: c4828cb8502d0b2adc39b9cde93df7d2886df897
      
https://github.com/qemu/qemu/commit/c4828cb8502d0b2adc39b9cde93df7d2886df897
  Author: Peter Maydell <peter.mayd...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M linux-user/syscall.c

  Log Message:
  -----------
  linux-user: Check for EFAULT failure in nanosleep

target_to_host_timespec() returns an error if the memory the guest
passed us isn't actually readable.  We check for this everywhere
except the callsite in the TARGET_NR_nanosleep case, so this mistake
was caught by a Coverity heuristic.

Add the missing error checks to the calls that convert between the
host and target timespec structs.

Coverity: CID 1507104
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-ID: <20250710164355.1296648-1-peter.mayd...@linaro.org>


  Commit: ff3b0e8d326155e45574dd14de5db6702a32d06e
      
https://github.com/qemu/qemu/commit/ff3b0e8d326155e45574dd14de5db6702a32d06e
  Author: Peter Maydell <peter.mayd...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M linux-user/gen-vdso.c

  Log Message:
  -----------
  linux-user/gen-vdso: Handle fseek() failure

Coverity points out that we don't check for fseek() failure in gen-vdso.c,
and so we might pass -1 to malloc(). Add the error checking.

(This is a standalone executable that doesn't link against glib, so
we can't do the easy thing and use g_file_get_contents().)

Coverity: CID 1523742
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-ID: <20250710170707.1299926-2-peter.mayd...@linaro.org>


  Commit: cb8607b89ffbba905eac3af595d1db974d2ffc5d
      
https://github.com/qemu/qemu/commit/cb8607b89ffbba905eac3af595d1db974d2ffc5d
  Author: Peter Maydell <peter.mayd...@linaro.org>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M linux-user/gen-vdso.c

  Log Message:
  -----------
  linux-user/gen-vdso: Don't read off the end of buf[]

In gen-vdso we load in a file and assume it's a valid ELF file.  In
particular we assume it's big enough to be able to read the ELF
information in e_ident in the ELF header.

Add a check that the total file length is at least big enough for all
the e_ident bytes, which is good enough for the code in gen-vdso.c.
This will catch the most obvious possible bad input file (truncated)
and allow us to run the sanity checks like "not actually an ELF file"
without potentially crashing.

The code in elf32_process() and elf64_process() still makes
assumptions about the file being well-formed, but this is OK because
we only run it on the vdso binaries that we create ourselves in the
build process by running the compiler.

Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-ID: <20250710170707.1299926-3-peter.mayd...@linaro.org>


  Commit: 91748d50c7ef4addcc9302160a4b8b3c63d5d024
      
https://github.com/qemu/qemu/commit/91748d50c7ef4addcc9302160a4b8b3c63d5d024
  Author: Thomas Weißschuh <tho...@t-8ch.de>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M linux-user/mips/target_signal.h
    M linux-user/syscall_defs.h

  Log Message:
  -----------
  linux-user/mips/o32: Drop sa_restorer functionality

The Linux kernel dropped support for sa_restorer on O32 MIPS in the
release 2.5.48 because it was unused. See the comment in
arch/mips/include/uapi/asm/signal.h.

Applications using the kernels UAPI headers will not reserve enough
space for qemu-user to copy the sigaction.sa_restorer field to.
Unrelated data may be overwritten.

Align qemu-user with the kernel by also dropping sa_restorer support.

Signed-off-by: Thomas Weißschuh <tho...@t-8ch.de>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-ID: <20250709-mips-sa-restorer-v1-1-fc17120e4...@t-8ch.de>


  Commit: e4e839b2eeea5745c48ce47144c7842eb7cd455f
      
https://github.com/qemu/qemu/commit/e4e839b2eeea5745c48ce47144c7842eb7cd455f
  Author: Geoffrey Thomas <geo...@ldpreload.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M linux-user/fd-trans.h
    M linux-user/main.c

  Log Message:
  -----------
  linux-user: Hold the fd-trans lock across fork

If another thread is holding target_fd_trans_lock during a fork,
then the lock becomes permanently locked in the child and the
emulator deadlocks at the next interaction with the fd-trans table.
As with other locks, acquire the lock in fork_start() and release
it in fork_end().

Cc: qemu-sta...@nongnu.org
Signed-off-by: Geoffrey Thomas <geo...@ldpreload.com>
Fixes: c093364f4d91 "fd-trans: Fix race condition on reallocation of the 
translation table."
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2846
Buglink: https://github.com/astral-sh/uv/issues/6105
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-ID: <20250314124742.4965-1-geo...@ldpreload.com>


  Commit: 90cff30d72d4f63fbfa637140b9e06e9894220c2
      
https://github.com/qemu/qemu/commit/90cff30d72d4f63fbfa637140b9e06e9894220c2
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M hw/intc/loongarch_extioi.c
    M hw/intc/loongarch_extioi_common.c
    M include/hw/intc/loongarch_extioi.h
    M include/hw/intc/loongarch_extioi_common.h

  Log Message:
  -----------
  hw/intc/loongarch_extioi: Move unrealize function to common code

Memory about LoongArchExtIOICommonState::cpu is allocated in common
code, it had better be freed in common code also.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>


  Commit: e5de64ae0233a13f5a623a62aec0b95d66ab7ce6
      
https://github.com/qemu/qemu/commit/e5de64ae0233a13f5a623a62aec0b95d66ab7ce6
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M target/loongarch/tcg/csr_helper.c

  Log Message:
  -----------
  target/loongarch: Correct spelling in helper_csrwr_pwcl()

There is small typo issue in function helper_csrwr_pwcl(), this patch
corrects this issue.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>


  Commit: 5a2e76fc8786760a8fbb42af5cd8a61ecb6aba87
      
https://github.com/qemu/qemu/commit/5a2e76fc8786760a8fbb42af5cd8a61ecb6aba87
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M target/loongarch/tcg/csr_helper.c

  Log Message:
  -----------
  target/loongarch: Fix CSR STLBPS register write emulation

Function helper_csrwr_stlbps() is emulation with CSR STLBPS register
write operation. However there is only parameter checking action, and
no register updating action. Here update value of CSR_STLBPS when
parameter passes to check.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>


  Commit: 94c874f0f2bdc048bacf9873d8d9ee9a68d44ea5
      
https://github.com/qemu/qemu/commit/94c874f0f2bdc048bacf9873d8d9ee9a68d44ea5
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M target/loongarch/tcg/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Remove unnecessary page size validity checking

Page size of TLB entry comes from CSR STLBPS and pwcl register. With
huge page, it is dir_base + dir_width from pwcl register. With normal
page, it is field of PTBASE from pwcl register.

So it is ok to check validity in function helper_ldpte() and function
helper_csrwr_stlbps(). And it is unnecessary in tlb entry fill path.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>


  Commit: 0492c8929f4cb58372273b956e2f8b3d93bd7e33
      
https://github.com/qemu/qemu/commit/0492c8929f4cb58372273b956e2f8b3d93bd7e33
  Author: Philippe Mathieu-Daudé <phi...@linaro.org>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M target/s390x/kvm/kvm.c

  Log Message:
  -----------
  target/s390x/kvm: Use vaddr in find/insert_hw_breakpoint()

Since commit b8a6eb1862a both kvm_arch_insert_hw_breakpoint()
and kvm_arch_remove_hw_breakpoint() use a vaddr type. Use the
same type for the callees.

Fixes: b8a6eb1862a ("sysemu/kvm: Use vaddr for 
kvm_arch_[insert|remove]_hw_breakpoint")
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-ID: <20250707171059.3064-2-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>


  Commit: 79d7e60c326bcb9d165e5d52a29b238937bedd8d
      
https://github.com/qemu/qemu/commit/79d7e60c326bcb9d165e5d52a29b238937bedd8d
  Author: Philippe Mathieu-Daudé <phi...@linaro.org>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M target/s390x/tcg/mem_helper.c

  Log Message:
  -----------
  target/s390x/tcg: Use vaddr in s390_probe_access()

Commit 70ebd9ce1cb ("s390x/tcg: Fault-safe memset") passed
vaddr type to access_prepare(), and commit b6c636f2cd6
("s390x/tcg: Fault-safe memmove") to do_access_get_byte(),
but declared S390Access::vaddr[1,2] as target_ulong.
Directly declare these as vaddr type, and have
s390_probe_access() use that type as argument.

Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-ID: <20250707171059.3064-3-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>


  Commit: 3ffa21d293bf5e4f997ba117ee3e943344b71044
      
https://github.com/qemu/qemu/commit/3ffa21d293bf5e4f997ba117ee3e943344b71044
  Author: Peter Maydell <peter.mayd...@linaro.org>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M hw/s390x/s390-pci-bus.c

  Log Message:
  -----------
  hw/s390x/s390-pci-bus.c: Use g_assert_not_reached() in functions taking an ett

The s390-pci-bus.c code, Coverity complains about a possible overflow
because get_table_index() can return -1 if the ett value passed in is
not one of the three permitted ZPCI_ETT_PT, ZPCI_ETT_ST, ZPCI_ETT_RT,
but the caller in table_translate() doesn't check this and instead
uses the return value directly in a calculation of the guest address
to read from.

In fact this case cannot happen, because:
 * get_table_index() is called only from table_translate()
 * the only caller of table_translate() loops through the ett values
   in the order RT, ST, PT until table_translate() returns 0
 * table_translate() will return 0 for the error cases and when
   translate_iscomplete() returns true
 * translate_iscomplete() is always true for ZPCI_ETT_PT

So table_translate() is always called with a valid ett value.

Instead of having the various functions called from table_translate()
return a default or dummy value when the ett argument is out of range,
use g_assert_not_reached() to indicate that this is impossible.

Coverity: CID 1547609
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Matthew Rosato <mjros...@linux.ibm.com>
Reviewed-by: Halil Pasic <pa...@linux.ibm.com>
Message-ID: <20250710161552.1287399-1-peter.mayd...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>


  Commit: a4adf071dc7ee615c2ed4517ad77b125e2e70066
      
https://github.com/qemu/qemu/commit/a4adf071dc7ee615c2ed4517ad77b125e2e70066
  Author: Thomas Huth <th...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M pc-bios/s390-ccw/netmain.c

  Log Message:
  -----------
  pc-bios/s390-ccw: Allow to select a different pxelinux.cfg entry via loadparm

Since we're linking the network booting code into the main firmware
binary nowadays, we can support the "loadparm" parameter now quite
easily for pxelinux.cfg config files that contain multiple entries.

Reviewed-by: Jared Rossi <jro...@linux.ibm.com>
Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250709083443.41574-2-th...@redhat.com>


  Commit: 108977796fbb765c7bcf040500ae9711cb2fa596
      
https://github.com/qemu/qemu/commit/108977796fbb765c7bcf040500ae9711cb2fa596
  Author: Thomas Huth <th...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M pc-bios/s390-ccw/netmain.c

  Log Message:
  -----------
  pc-bios/s390-ccw: Allow up to 31 entries for pxelinux.cfg

We're going to support a menu for the pxelinux.cfg code, and to be able
to reuse some functionality from menu.c, we should align the maximum
amount of possible entries with the MAX_BOOT_ENTRIES constant that is
used there. Thus replace MAX_PXELINUX_ENTRIES with MAX_BOOT_ENTRIES.

Reviewed-by: Jared Rossi <jro...@linux.ibm.com>
Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250709083443.41574-3-th...@redhat.com>


  Commit: 47d68f7475feb86c9347f7013066b3b05b545cfc
      
https://github.com/qemu/qemu/commit/47d68f7475feb86c9347f7013066b3b05b545cfc
  Author: Thomas Huth <th...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M pc-bios/s390-ccw/menu.c
    M pc-bios/s390-ccw/s390-ccw.h

  Log Message:
  -----------
  pc-bios/s390-ccw: Make get_boot_index() from menu.c global

We are going to reuse this function for selecting an entry from
the pxelinux.cfg menu, so rename this function with a "menu_"
prefix and make it available globally.

Reviewed-by: Jared Rossi <jro...@linux.ibm.com>
Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250709083443.41574-4-th...@redhat.com>


  Commit: fc24fd9342ec5ddaeecdf2a28f7fc4c2cdf6b014
      
https://github.com/qemu/qemu/commit/fc24fd9342ec5ddaeecdf2a28f7fc4c2cdf6b014
  Author: Thomas Huth <th...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M pc-bios/s390-ccw/netmain.c

  Log Message:
  -----------
  pc-bios/s390-ccw: Add a boot menu for booting via pxelinux.cfg

Show a simple boot menu for pxelinux.cfg, too, if the user requested it.

Reviewed-by: Jared Rossi <jro...@linux.ibm.com>
Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250709083443.41574-5-th...@redhat.com>


  Commit: c784de966b154810a4c97eb0e4a658ec6457dd4c
      
https://github.com/qemu/qemu/commit/c784de966b154810a4c97eb0e4a658ec6457dd4c
  Author: Thomas Huth <th...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M MAINTAINERS
    M tests/functional/meson.build
    A tests/functional/test_s390x_pxelinux.py

  Log Message:
  -----------
  tests/functional: Add a test for s390x pxelinux.cfg network booting

Check the various ways of booting a kernel via pxelinux.cfg file,
e.g. by specifying the config file name via the MAC address or the
UUID of the guest. Also check whether we can successfully load an
alternate kernel via the "loadparm" parameter here and whether the
boot menu shows up with "-boot menu=on".

Reviewed-by: Jared Rossi <jro...@linux.ibm.com>
Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250709083443.41574-6-th...@redhat.com>


  Commit: acb00a7aae47e9f6e9a955f4c83e2295c7271837
      
https://github.com/qemu/qemu/commit/acb00a7aae47e9f6e9a955f4c83e2295c7271837
  Author: Sertonix <serto...@posteo.net>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M pc-bios/s390-ccw/Makefile

  Log Message:
  -----------
  pc-bios/s390-ccw: link statically

Adding -pie to LDFLAGS caused s390-ccw.img to become dynamically linked.
By using -static-pie it will be linked statically like other bios.

This ensures that the build output doesn't change depending on the
default dynamic loader path of the toolchain.

Fixes: d884c86dcd3b ("s390/bios: Make the s390-ccw.img relocatable")
Signed-off-by: Sertonix <serto...@posteo.net>
Message-ID: <daj1qosap9ls.342sqsm0uz...@posteo.net>
Signed-off-by: Thomas Huth <th...@redhat.com>


  Commit: 21820b4b479842c7fa67ec65f9b0b62c286b86f4
      
https://github.com/qemu/qemu/commit/21820b4b479842c7fa67ec65f9b0b62c286b86f4
  Author: Thomas Huth <th...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M pc-bios/s390-ccw.img

  Log Message:
  -----------
  pc-bios: Update the s390 bios images with the pxelinux.cfg loadparm changes

This new s390-ccw.img binary contains the addition of the loadparm
feature to the pxelinux.cfg network booting code.

Signed-off-by: Thomas Huth <th...@redhat.com>


  Commit: 06fcf87f56ac47b89932b3698e86224ea7bc5a93
      
https://github.com/qemu/qemu/commit/06fcf87f56ac47b89932b3698e86224ea7bc5a93
  Author: Thomas Huth <th...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M tests/functional/meson.build

  Log Message:
  -----------
  tests/functional: Add dependency to the keymap_targets

When doing a "configure" in a an empty build directory, followed by
a "make check" without a normal build in between, the vnc functional
test currently fails since the keymaps have not been built yet.
Thus add a dependency to the keymap_targets here to make sure that
the keymaps are built before running the functional tests.

Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250701104827.363904-1-th...@redhat.com>


  Commit: 3b1cf40dd665a0c4c38bc339fea6eacf1742b46c
      
https://github.com/qemu/qemu/commit/3b1cf40dd665a0c4c38bc339fea6eacf1742b46c
  Author: Thomas Huth <th...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M tests/functional/test_ppc_bamboo.py

  Log Message:
  -----------
  tests/functional/test_ppc_bamboo: Replace broken link with working assets

The old image that we used for testing the bamboo machine has disappeared
from the internet. Fortunately there is another kernel + initrd provided
by Cédric that can be used for testing this machine, too.

Reported-by: Stefan Hajnoczi <stefa...@gmail.com>
Suggested-by: Cédric Le Goater <c...@kaod.org>
Reviewed-by: Cédric Le Goater <c...@redhat.com>
Signed-off-by: Thomas Huth <th...@redhat.com>
Message-ID: <20250707184736.88660-1-th...@redhat.com>


  Commit: 40c94731c4495e78f0f7402890eb01a0f43a64ca
      
https://github.com/qemu/qemu/commit/40c94731c4495e78f0f7402890eb01a0f43a64ca
  Author: Philippe Mathieu-Daudé <phi...@linaro.org>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M target/s390x/s390x-internal.h

  Log Message:
  -----------
  target/s390x: Remove unused s390_cpu_[un]halt() user stubs

Since commit da944885469 ("target/s390x: make helper.c
sysemu-only") target/s390x/helper.c is only built for
system mode, so s390_cpu_halt() and s390_cpu_unhalt()
are never called from user mode.

Fixes: da944885469 ("target/s390x: make helper.c sysemu-only")
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-ID: <20250708095746.12697-2-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>


  Commit: b1180352f1c758ba4270cdaa3c41ceead3a43aad
      
https://github.com/qemu/qemu/commit/b1180352f1c758ba4270cdaa3c41ceead3a43aad
  Author: Philippe Mathieu-Daudé <phi...@linaro.org>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M target/s390x/cpu-system.c
    M target/s390x/s390x-internal.h

  Log Message:
  -----------
  target/s390x: Expose s390_count_running_cpus() method

In order to simplify the next commit where s390_count_running_cpus()
is split out of s390_cpu_halt(), make its prototype public as a
preliminary step.

Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-ID: <20250708095746.12697-3-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>


  Commit: 693b3039d77195953e70f008991c80bf9c5b9691
      
https://github.com/qemu/qemu/commit/693b3039d77195953e70f008991c80bf9c5b9691
  Author: Philippe Mathieu-Daudé <phi...@linaro.org>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M target/s390x/cpu-system.c
    M target/s390x/helper.c
    M target/s390x/s390x-internal.h

  Log Message:
  -----------
  target/s390x: Have s390_cpu_halt() not return anything

Since halting a vCPU and how many left running do not need
to be tied together, split the s390_count_running_cpus()
call out of s390_cpu_halt() to the single caller using it:
s390_handle_wait().

Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-ID: <20250708095746.12697-4-phi...@linaro.org>
Signed-off-by: Thomas Huth <th...@redhat.com>


  Commit: 34fc927b9138b7c4b91e58d29e26d27e04510a4b
      
https://github.com/qemu/qemu/commit/34fc927b9138b7c4b91e58d29e26d27e04510a4b
  Author: Richard Henderson <richard.hender...@linaro.org>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M target/arm/tcg/helper.h
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Remove helper_sme2_luti4_4b

This function isn't used.

Resolves: Coverity CID 1612139
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-id: 20250710173945.115428-1-richard.hender...@linaro.org
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 26bab49db56acf8ef767a60fa1feb27a3556d3ec
      
https://github.com/qemu/qemu/commit/26bab49db56acf8ef767a60fa1feb27a3556d3ec
  Author: Jackson Donaldson <jackson88...@gmail.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    A docs/system/arm/max78000.rst
    M docs/system/target-arm.rst

  Log Message:
  -----------
  docs/system: arm: Add max78000 board description

This adds the target guide for the max78000FTHR

Signed-off-by: Jackson Donaldson <jc...@duck.com>
Message-id: 20250711110626.624534-2-jc...@duck.com
[PMM: Moved doc to correct place in index; made underlines correct
 length; added missing trailing newline; added SPDX]
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 3a323a813fd42fc7c37ef09bc7a714d8e31691ce
      
https://github.com/qemu/qemu/commit/3a323a813fd42fc7c37ef09bc7a714d8e31691ce
  Author: Jackson Donaldson <jackson88...@gmail.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M tests/functional/meson.build
    A tests/functional/test_arm_max78000fthr.py

  Log Message:
  -----------
  tests/functional: Add a test for the MAX78000 arm machine

Runs a binary from the max78000test repo used in
developing the qemu implementation of the max78000
to verify that the machine and implemented devices
generally still work.

Signed-off-by: Jackson Donaldson <jc...@duck.com>
Reviewed-by: Thomas Huth <th...@redhat.com>
Message-id: 20250711110626.624534-3-jc...@duck.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>


  Commit: 31a90360fd8209fb479964a37c4329d5dbc3fb07
      
https://github.com/qemu/qemu/commit/31a90360fd8209fb479964a37c4329d5dbc3fb07
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/migration-hmp-cmds.c

  Log Message:
  -----------
  migration/hmp: Reorg "info migrate" once more

Dave suggested the HMP output for "info migrate" can not only leverage the
lines but also better grouping:

  https://lore.kernel.org/r/aC4_-nMc7FwsMf9p@gallifrey

I followed Dave's suggestion, and some more modifications on top:

  - Added all elements into the picture

  - Use size_to_str() and drop most of the units: benefit is more friendly
  to most human eyes, bad side effect is lose of details, but that should
  be corner case per my uses, and one can still leverage the QMP interface
  when necessary.

  - Sub-grouping for "Transfers" ("Channels" and "Page Types").

  - Better indentations

Sample output:

(qemu) info migrate
Status:                 postcopy-active
Time (ms):              total=47317, setup=5, down=8
RAM info:
  Throughput (Mbps):    1342.83
  Sizes:                pagesize=4 KiB, total=4.02 GiB
  Transfers:            transferred=1.41 GiB, remain=2.46 GiB
    Channels:           precopy=15.2 MiB, multifd=0 B, postcopy=1.39 GiB
    Page Types:         normal=367713, zero=41195
  Page Rates (pps):     transfer=40900, dirty=4
  Others:               dirty_syncs=2, postcopy_req=57503

Suggested-by: Dr. David Alan Gilbert <d...@treblig.org>
Tested-by: Li Zhijian <lizhij...@fujitsu.com>
Reviewed-by: Li Zhijian <lizhij...@fujitsu.com>
Acked-by: Dr. David Alan Gilbert <d...@treblig.org>
Reviewed-by: Juraj Marcin <jmar...@redhat.com>
Tested-by: Mario Casquero <mcasq...@redhat.com>
Link: https://lore.kernel.org/r/20250613140801.474264-2-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: 2862d6d4fb09f57cabc4389fed34ae767ab2da94
      
https://github.com/qemu/qemu/commit/2862d6d4fb09f57cabc4389fed34ae767ab2da94
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/migration-hmp-cmds.c

  Log Message:
  -----------
  migration/hmp: Fix postcopy-blocktime per-vCPU results

Unfortunately, it was never correctly shown..

This is only found when I started to look into making the blocktime feature
more useful (so as to avoid using bpftrace, even though I'm not sure which
one will be harder to use..).

So the old dump would look like this:

  Postcopy vCPU Blocktime: 0-1,4,10,21,33,46,48,59

Even though there're actually 40 vcpus, and the string will merge same
elements and also sort them.

To fix it, simply loop over the uint32List manually.  Now it looks like:

  Postcopy vCPU Blocktime (ms):
   [15, 0, 0, 43, 29, 34, 36, 29, 37, 41,
    33, 37, 45, 52, 50, 38, 40, 37, 40, 49,
    40, 35, 35, 35, 81, 19, 18, 19, 18, 30,
    22, 3, 0, 0, 0, 0, 0, 0, 0, 0]

Cc: Dr. David Alan Gilbert <d...@treblig.org>
Cc: Alexey Perevalov <a.pereva...@samsung.com>
Cc: Markus Armbruster <arm...@redhat.com>
Tested-by: Mario Casquero <mcasq...@redhat.com>
Reviewed-by: Juraj Marcin <jmar...@redhat.com>
Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613140801.474264-3-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: 35290df01b064134a57339b2dbfee8713f9e6d85
      
https://github.com/qemu/qemu/commit/35290df01b064134a57339b2dbfee8713f9e6d85
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M docs/devel/migration/postcopy.rst

  Log Message:
  -----------
  migration/docs: Move docs for postcopy blocktime feature

Move it out of vanilla postcopy session, but instead a standalone feature.
When at it, removing the NOTE because it's incorrect now after introduction
of max-postcopy-bandwidth, which can control the throughput even for
postcopy phase.

Reviewed-by: Juraj Marcin <jmar...@redhat.com>
Link: https://lore.kernel.org/r/20250613140801.474264-4-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: 2145f38c31e940abca19bb8a9dc0d2549a40df14
      
https://github.com/qemu/qemu/commit/2145f38c31e940abca19bb8a9dc0d2549a40df14
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/migration.c

  Log Message:
  -----------
  migration/bg-snapshot: Do not check for SKIP in iterator

It's not possible to happen in bg-snapshot case.

Reviewed-by: Juraj Marcin <jmar...@redhat.com>
Link: https://lore.kernel.org/r/20250613140801.474264-5-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: d7530a9682b7cdac1859dcf1e28573415d2afd56
      
https://github.com/qemu/qemu/commit/d7530a9682b7cdac1859dcf1e28573415d2afd56
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M include/migration/register.h
    M migration/block-dirty-bitmap.c
    M migration/ram.c
    M migration/savevm.c

  Log Message:
  -----------
  migration: Drop save_live_complete_postcopy hook

The hook is only defined in two vmstate users ("ram" and "block dirty
bitmap"), meanwhile both of them define the hook exactly the same as the
precopy version.  Hence, this postcopy version isn't needed.

No functional change intended.

Reviewed-by: Juraj Marcin <jmar...@redhat.com>
Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613140801.474264-6-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: 57c43e52bdf7f97c7555f408bddbc0b95e081844
      
https://github.com/qemu/qemu/commit/57c43e52bdf7f97c7555f408bddbc0b95e081844
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M docs/devel/migration/main.rst
    M docs/devel/migration/vfio.rst
    M hw/ppc/spapr.c
    M hw/s390x/s390-stattrib.c
    M hw/vfio/migration.c
    M include/migration/register.h
    M migration/block-dirty-bitmap.c
    M migration/ram.c
    M migration/savevm.c

  Log Message:
  -----------
  migration: Rename save_live_complete_precopy to save_complete

Now after merging the precopy and postcopy version of complete() hook,
rename the precopy version from save_live_complete_precopy() to
save_complete().

Dropping the "live" when at it, because it's in most cases not live when
happening (in precopy).

No functional change intended.

Reviewed-by: Juraj Marcin <jmar...@redhat.com>
Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613140801.474264-7-pet...@redhat.com
[peterx: squash the fixup that covers a few more doc spots, per Juraj]
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: 7dd95a963072e0e33addbf2c87b548a624ce66b6
      
https://github.com/qemu/qemu/commit/7dd95a963072e0e33addbf2c87b548a624ce66b6
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/savevm.c

  Log Message:
  -----------
  migration: qemu_savevm_complete*() helpers

Since we use the same save_complete() hook for both precopy and postcopy,
add a set of helpers to invoke the hook() to dedup the code.

Reviewed-by: Juraj Marcin <jmar...@redhat.com>
Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613140801.474264-8-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: ff9dfc41d9e74651d565a3cad80dbaac3cde1eb9
      
https://github.com/qemu/qemu/commit/ff9dfc41d9e74651d565a3cad80dbaac3cde1eb9
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/ram.c

  Log Message:
  -----------
  migration/ram: One less indent for ram_find_and_save_block()

The check over PAGE_DIRTY_FOUND isn't necessary. We could indent one less
and assert that instead.

Reviewed-by: Juraj Marcin <jmar...@redhat.com>
Link: https://lore.kernel.org/r/20250613140801.474264-9-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: f1549da610dc3d37da4de0e3ba7374c5316af716
      
https://github.com/qemu/qemu/commit/f1549da610dc3d37da4de0e3ba7374c5316af716
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/ram.c
    M migration/trace-events

  Log Message:
  -----------
  migration/ram: Add tracepoints for ram_save_complete()

Take notes on start/end state of dirty pages for the whole system.

Reviewed-by: Juraj Marcin <jmar...@redhat.com>
Link: https://lore.kernel.org/r/20250613140801.474264-10-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: 7aaa1fc072ca7b9abf08c62504faa96126b583ce
      
https://github.com/qemu/qemu/commit/7aaa1fc072ca7b9abf08c62504faa96126b583ce
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/migration.c

  Log Message:
  -----------
  migration: Rewrite the migration complete detect logic

There're a few things off here in that logic, rewrite it.  When at it, add
rich comment to explain each of the decisions.

Since this is very sensitive path for migration, below are the list of
things changed with their reasonings.

  (1) Exact pending size is only needed for precopy not postcopy

      Fundamentally it's because "exact" version only does one more deep
      sync to fetch the pending results, while in postcopy's case it's
      never going to sync anything more than estimate as the VM on source
      is stopped.

  (2) Do _not_ rely on threshold_size anymore to decide whether postcopy
      should complete

      threshold_size was calculated from the expected downtime and
      bandwidth only during precopy as an efficient way to decide when to
      switchover.  It's not sensible to rely on threshold_size in postcopy.

      For precopy, if switchover is decided, the migration will complete
      soon.  It's not true for postcopy.  Logically speaking, postcopy
      should only complete the migration if all pending data is flushed.

      Here it used to work because save_complete() used to implicitly
      contain save_live_iterate() when there's pending size.

      Even if that looks benign, having RAMs to be migrated in postcopy's
      save_complete() has other bad side effects:

      (a) Since save_complete() needs to be run once at a time, it means
      when moving RAM there's no way moving other things (rather than
      round-robin iterating the vmstate handlers like what we do with
      ITERABLE phase).  Not an immediate concern, but it may stop working
      in the future when there're more than one iterables (e.g. vfio
      postcopy).

      (b) postcopy recovery, unfortunately, only works during ITERABLE
      phase. IOW, if src QEMU moves RAM during postcopy's save_complete()
      and network failed, then it'll crash both QEMUs... OTOH if it failed
      during iteration it'll still be recoverable.  IOW, this change should
      further reduce the window QEMU split brain and crash in extreme cases.

      If we enable the ram_save_complete() tracepoints, we'll see this
      before this patch:

      1267959@1748381938.294066:ram_save_complete dirty=9627, done=0
      1267959@1748381938.308884:ram_save_complete dirty=0, done=1

      It means in this migration there're 9627 pages migrated at complete()
      of postcopy phase.

      After this change, all the postcopy RAM should be migrated in iterable
      phase, rather than save_complete():

      1267959@1748381938.294066:ram_save_complete dirty=0, done=0
      1267959@1748381938.308884:ram_save_complete dirty=0, done=1

  (3) Adjust when to decide to switch to postcopy

      This shouldn't be super important, the movement makes sure there's
      only one in_postcopy check, then we are clear on what we do with the
      two completely differnt use cases (precopy v.s. postcopy).

  (4) Trivial touch up on threshold_size comparision

      Which changes:

      "(!pending_size || pending_size < s->threshold_size)"

      into:

      "(pending_size <= s->threshold_size)"

Reviewed-by: Juraj Marcin <jmar...@redhat.com>
Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613140801.474264-11-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: adb13d6e42d6e0084e19a41303138d5d022e5904
      
https://github.com/qemu/qemu/commit/adb13d6e42d6e0084e19a41303138d5d022e5904
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/ram.c

  Log Message:
  -----------
  migration/postcopy: Avoid clearing dirty bitmap for postcopy too

This is a follow up on the other commit "migration/ram: avoid to do log
clear in the last round" but for postcopy.

https://lore.kernel.org/r/20250514115827.3216082-1-yanfei...@bytedance.com

I can observe more than 10% reduction of average page fault latency during
postcopy phase with this optimization:

  Before: 268.00us (+-1.87%)
  After:  232.67us (+-2.01%)

The test was done with a 16GB VM with 80 vCPUs, running a workload that
busy random writes to 13GB memory.

Cc: Yanfei Xu <yanfei...@bytedance.com>
Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613140801.474264-12-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: f62b7a0a29192891f0139f2ad8009f55a41c8641
      
https://github.com/qemu/qemu/commit/f62b7a0a29192891f0139f2ad8009f55a41c8641
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/options.c

  Log Message:
  -----------
  migration: Add option to set postcopy-blocktime

Add a global property to allow enabling postcopy-blocktime feature.

Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613141217.474825-2-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: d2a81ca8c6fbe6ed691889d953d0b5fe2c7e4671
      
https://github.com/qemu/qemu/commit/d2a81ca8c6fbe6ed691889d953d0b5fe2c7e4671
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/migration.c
    M migration/migration.h
    M migration/postcopy-ram.c
    M migration/postcopy-ram.h
    M migration/trace-events

  Log Message:
  -----------
  migration/postcopy: Push blocktime start/end into page req mutex

The postcopy blocktime feature was tricky that it used quite some atomic
operations over quite a few arrays and vars, without explaining how that
would be thread safe.  The thread safety here is about concurrency between
the fault thread and the fault resolution threads, possible to access the
same chunk of data.  All these atomic ops can be expensive too before
knowing clearly how it works.

OTOH, postcopy has one page_request_mutex used to serialize the received
bitmap updates.  So far it's ok - we don't yet have a lot of threads
contending the lock.  It might change after multifd will be supported, but
that's a separate story.  What is important is, with that mutex, it's
pretty lightweight to move all the blocktime maintenance into the mutex
critical section.  It's because the blocktime layer is lightweighted:
almost "remember which vcpu faulted on which address", and "ok we get some
fault resolved, calculate how long it takes".  It's also an optional
feature for now (but I have thought of changing that, maybe in the future).

Let's push the blocktime layer into the mutex, so that it's always
thread-safe even without any atomic ops.

To achieve that, I'll need to add a tid parameter on fault path so that
it'll start to pass the faulted thread ID into deeper the stack, but not
too deep.  When at it, add a comment for the shared fault handler (for
example, vhost-user devices running with postcopy), to mention a TODO.  One
reason it might not be trivial is that vhost-user's userfaultfds should be
opened by vhost-user process, so it's pretty hard to control making sure
the TID feature will be around.  It wasn't supported before, so keep it
like that for now.

Now we should be as ease when everything is protected by a mutex that we
always take anyway.

One side effect: we can finally remove one ramblock_recv_bitmap_test() in
mark_postcopy_blocktime_begin(), which was pretty weird and which also
includes a weird (but maybe necessary.. but maybe not?) operation to inject
a blocktime entry then quickly erase it..  When we're with the mutex, and
when we make sure it's invoked after checking the receive bitmap, it's not
needed anymore.  Instead, we assert.

As another side effect, this paves way for removing all atomic ops in all
the mem accesses in blocktime layer.

Note that we need a stub for mark_postcopy_blocktime_begin() for Windows
builds.

Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613141217.474825-3-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: c0f47dfb5b06c40ef41641a5f03ebafa8125c557
      
https://github.com/qemu/qemu/commit/c0f47dfb5b06c40ef41641a5f03ebafa8125c557
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/postcopy-ram.c

  Log Message:
  -----------
  migration/postcopy: Drop all atomic ops in blocktime feature

Now with the mutex protection it's not needed anymore.

Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613141217.474825-4-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: b2819530e3134fb47c92c1bf0f3def8ea5b1c8ee
      
https://github.com/qemu/qemu/commit/b2819530e3134fb47c92c1bf0f3def8ea5b1c8ee
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/postcopy-ram.c
    M migration/trace-events

  Log Message:
  -----------
  migration/postcopy: Make all blocktime vars 64bits

I am guessing it was used to be 32bits because of the atomic ops.  Now all
the atomic ops are gone and we're protected by a mutex instead, it's ok we
can switch to 64 bits.

Reasons to move over:

  - Allow further patches to change the unit from ms to us: with postcopy
  preempt mode, we're really into hundreds of microseconds level on
  blocktime.  We'd better be able to trap those.

  - This also paves way for some other tricks that the original version
  used to avoid overflows, e.g., start_time was almost only useful before
  to make sure the sampled timestamp won't overflow a 32-bit field.

  - This prepares further reports on top of existing data collected,
  e.g. average page fault latencies.  When average operation is taken into
  account, milliseconds are simply too coarse grained.

When at it:

  - Rename page_fault_vcpu_time to vcpu_blocktime_start.

  - Rename vcpu_blocktime to vcpu_blocktime_total.

  - Touch up the trace-events to not dump blocktime ctx pointer

Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613141217.474825-5-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: 08fb2a933586183be788aac43c62b2993e0a99ce
      
https://github.com/qemu/qemu/commit/08fb2a933586183be788aac43c62b2993e0a99ce
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/postcopy-ram.c

  Log Message:
  -----------
  migration/postcopy: Drop PostcopyBlocktimeContext.start_time

Now with 64bits, the offseting using start_time is not needed anymore,
because the array can always remember the whole timestamp.

Then drop the unused parameter in get_low_time_offset() altogether.

Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613141217.474825-6-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: a098761f63e019b75a23575bb8d5a520c0dbce64
      
https://github.com/qemu/qemu/commit/a098761f63e019b75a23575bb8d5a520c0dbce64
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/postcopy-ram.c

  Log Message:
  -----------
  migration/postcopy: Bring blocktime layer to ns level

With 64-bit fields, it is trivial.  The caution is when exposing any values
in QMP, it was still declared with milliseconds (ms).  Hence it's needed to
do the convertion when exporting the values to existing QMP queries.

Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613141217.474825-7-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: 271a1940e91a32fab6165841279f250204f53ae4
      
https://github.com/qemu/qemu/commit/271a1940e91a32fab6165841279f250204f53ae4
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/postcopy-ram.c

  Log Message:
  -----------
  migration/postcopy: Add blocktime fault counts per-vcpu

Add a field to count how many remote faults one vCPU has taken.  So far
it's still not used, but will be soon.

Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613141217.474825-8-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: b4c82b428828c0ffff273a49f24a22cb4e18d485
      
https://github.com/qemu/qemu/commit/b4c82b428828c0ffff273a49f24a22cb4e18d485
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/migration-hmp-cmds.c
    M migration/postcopy-ram.c
    M qapi/migration.json
    M tests/qtest/migration/migration-qmp.c

  Log Message:
  -----------
  migration/postcopy: Report fault latencies in blocktime

Blocktime so far only cares about the time one vcpu (or the whole system)
got blocked.  It would be also be helpful if it can also report the latency
of page requests, which could be very sensitive during postcopy.

Blocktime itself is sometimes not very important, especially when one
thinks about KVM async PF support, which means vCPUs are literally almost
not blocked at all because the guest OS is smart enough to switch to
another task when a remote fault is needed.

However, latency is still sensitive and important because even if the guest
vCPU is running on threads that do not need a remote fault, the workload
that accesses some missing page is still affected.

Add two entries to the report, showing how long it takes to resolve a
remote fault.  Mention in the QAPI doc that this is not the real average
fault latency, but only the ones that was requested for a remote fault.

Unwrap get_vcpu_blocktime_list() so we don't need to walk the list twice,
meanwhile add the entry checks in qtests for all postcopy tests.

Cc: Markus Armbruster <arm...@redhat.com>
Cc: Dr. David Alan Gilbert <d...@treblig.org>
Reviewed-by: Fabiano Rosas <faro...@suse.de>
Tested-by: Mario Casquero <mcasq...@redhat.com>
Link: https://lore.kernel.org/r/20250613141217.474825-9-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: f07f2a3092b70d407a009dae28b44ecc8fbcffb7
      
https://github.com/qemu/qemu/commit/f07f2a3092b70d407a009dae28b44ecc8fbcffb7
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/postcopy-ram.c

  Log Message:
  -----------
  migration/postcopy: Initialize blocktime context only until listen

Before this patch, the blocktime context can be created very early, because
postcopy_ram_supported_by_host() <- migrate_caps_check() can happen during
migration object init.

The trick here is the blocktime context needs system vCPU information,
which seems to be possible to change after that point.  I didn't verify it,
but it doesn't sound right.

Now move it out and initialize the context only when postcopy listen
starts.  That is already during a migration so it should be guaranteed the
vCPU topology can never change on both sides.

While at it, assert that the ctx isn't created instead this time; the old
"if" trick isn't needed when we're sure it will only happen once now.

Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613141217.474825-10-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: 28a185204ee9a4dd1b0da38c92f2d9326ca590d5
      
https://github.com/qemu/qemu/commit/28a185204ee9a4dd1b0da38c92f2d9326ca590d5
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/postcopy-ram.c
    M migration/trace-events

  Log Message:
  -----------
  migration/postcopy: Cache the tid->vcpu mapping for blocktime

Looking up the vCPU index for each fault can be expensive when there're
hundreds of vCPUs.  Provide a cache for tid->vcpu instead with a hash
table, then lookup from there.

When at it, add another counter to record how many non-vCPU faults it gets.
For example, the main thread can also access a guest page that was missing.
These kind of faults are not accounted by blocktime so far.

Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613141217.474825-11-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: 4c8a1194852844a1fc07af804579c7cf997e5c4a
      
https://github.com/qemu/qemu/commit/4c8a1194852844a1fc07af804579c7cf997e5c4a
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/postcopy-ram.c

  Log Message:
  -----------
  migration/postcopy: Cleanup the total blocktime accounting

The variable vcpu_total_blocktime isn't easy to follow.  In reality, it
wants to capture the case where all vCPUs are stopped, and now there will
be some vCPUs starts running.

The name now starts to conflict with vcpu_blocktime_total[], meanwhile it's
actually not necessary to have the variable at all: since nobody is
touching smp_cpus_down except ourselves, we can safely do the calculation
at the end before decrementing smp_cpus_down.

Hopefully this makes the logic easier to read, side benefit is we drop one
temp var.

Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613141217.474825-12-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: b63a2e9e4b6dd779f7a699162ffdafc95e905c80
      
https://github.com/qemu/qemu/commit/b63a2e9e4b6dd779f7a699162ffdafc95e905c80
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/postcopy-ram.c
    M migration/trace-events

  Log Message:
  -----------
  migration/postcopy: Optimize blocktime fault tracking with hashtable

Currently, the postcopy blocktime feature maintains vCPU fault information
using an array (vcpu_addr[]).  It has two issues.

Issue 1: Performance Concern
============================

The old algorithm was almost OK and fast on inserts, except that the lookup
is slow and won't scale if there are a lot of vCPUs: when a page is copied
during postcopy, mark_postcopy_blocktime_end() will walk the whole array
trying to find which vCPUs are blocked by the address.  So it needs
constant O(N) walk for each page resolution.

Alexey (the author of postcopy blocktime) mentioned the perf issue and how
to optimize it in a piece of comment in the page resolution path.  The
comment was (interestingly..) not complete, but it's relatively clear what
he wanted to say about this perf issue.

Issue 2: Wrong Accounting on re-entrancies
==========================================

People might think that each vCPU should only and always get one fault at a
time, so that when the blocktime layer captured one fault on one vCPU, we
should never see another fault message on this vCPU.

It's almost correct, except in some extreme rare cases.

Case 1: it's possible the fault thread processes the userfaultfd messages
too fast so it can see >1 messages on one vCPU before the previous one was
resolved.

Case 2: it's theoretically also possible one vCPU can get even more than
one message on the same fault address if a fault is retried by the
kernel (e.g., handle_userfault() got interrupted before page resolution).

As this info might be important, instead of using commit message, I put
more details into the code as comment, when introducing an array
maintaining concurrent faults on one vCPU.  Please refer to the comments
for details on both cases, especially case 1 which can be tricky.

Case 1 sounds rare, but it can be easily reproduced locally for me when we
run blocktime together with the migration-test on the vanilla postcopy.

New Design
==========

This patch should do almost what Alexey mentioned, but slightly
differently: instead of having an array to maintain vCPU fault addresses,
for each of the fault message we push a message into a hash, indexed by the
fault address.

With the hash, it can replace the old two structs: both the vcpu_addr[]
array, and also the array to store the start time of the fault.  However
due to above we need one more counter array to account concurrent faults on
the same vCPU - that should even be needed in the old code, it's just that
the old code was buggy and it will blindly overwrite an existing
entry.. now we'll start to really track everything.

The hash structure might be more efficient than tree to maintain such
addr->(cpu, fault_time) information, so that the insert() and lookup()
paths should ideally both be ~O(1).  After all, we do not need to sort.

Here we need to do one remove() though after the lookup().  It could be
slow but only if many vCPUs faulted exactly on the same address (so when
the list of cpu entries is long), which should be unlikely. Even with that,
it's still a worst case O(N) (consider 400 vCPUs faulted on the same
address and how likely is it..) rather than a constant O(N) complexity.

When at it, touch up the tracepoints to make them slightly more useful.
One tracepoint is added when walking all the fault entries.

Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613141217.474825-13-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: ed23a159763293e84d3562dedd731192b093b808
      
https://github.com/qemu/qemu/commit/ed23a159763293e84d3562dedd731192b093b808
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/migration-hmp-cmds.c
    M migration/postcopy-ram.c
    M migration/trace-events
    M qapi/migration.json
    M tests/qtest/migration/migration-qmp.c

  Log Message:
  -----------
  migration/postcopy: blocktime allows track / report non-vCPU faults

When used to report page fault latencies, the blocktime feature can be
almost useless when KVM async page fault is enabled, because in most cases
such remote fault will kickoff async page faults, then it's not trackable
from blocktime layer.

After all these recent rewrites to blocktime layer, it's finally so easy to
also support tracking non-vCPU faults.  It'll be even faster if we could
always index fault records with TIDs, unfortunately we need to maintain the
blocktime API which report things in vCPU indexes.

Of course this can work not only for kworkers, but also any guest accesses
that may reach a missing page, for example, very likely when in the QEMU
main thread too (and all other threads whenever applicable).

In this case, we don't care about "how long the threads are blocked", but
we only care about "how long the fault will be resolved".

Cc: Markus Armbruster <arm...@redhat.com>
Cc: Dr. David Alan Gilbert <d...@treblig.org>
Reviewed-by: Fabiano Rosas <faro...@suse.de>
Tested-by: Mario Casquero <mcasq...@redhat.com>
Link: https://lore.kernel.org/r/20250613141217.474825-14-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: 3345fb3b6d7f511c948bfb153b85b3cabb996231
      
https://github.com/qemu/qemu/commit/3345fb3b6d7f511c948bfb153b85b3cabb996231
  Author: Peter Xu <pet...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M migration/migration-hmp-cmds.c
    M migration/postcopy-ram.c
    M qapi/migration.json
    M tests/qtest/migration/migration-qmp.c

  Log Message:
  -----------
  migration/postcopy: Add latency distribution report for blocktime

Add the latency distribution too for blocktime, using order-of-two buckets.
It accounts for all the faults, from either vCPU or non-vCPU threads.  With
prior rework, it's very easy to achieve by adding an array to account for
faults in each buckets.

Sample output for HMP (while for QMP it's simply an array):

Postcopy Latency Distribution:
  [     1 us -     2 us ]:          0
  [     2 us -     4 us ]:          0
  [     4 us -     8 us ]:          1
  [     8 us -    16 us ]:          2
  [    16 us -    32 us ]:          2
  [    32 us -    64 us ]:          3
  [    64 us -   128 us ]:      10169
  [   128 us -   256 us ]:      50151
  [   256 us -   512 us ]:      12876
  [   512 us -     1 ms ]:         97
  [     1 ms -     2 ms ]:         42
  [     2 ms -     4 ms ]:         44
  [     4 ms -     8 ms ]:         93
  [     8 ms -    16 ms ]:        138
  [    16 ms -    32 ms ]:          0
  [    32 ms -    65 ms ]:          0
  [    65 ms -   131 ms ]:          0
  [   131 ms -   262 ms ]:          0
  [   262 ms -   524 ms ]:          0
  [   524 ms -    1 sec ]:          0
  [    1 sec -    2 sec ]:          0
  [    2 sec -    4 sec ]:          0
  [    4 sec -    8 sec ]:          0
  [    8 sec -   16 sec ]:          0

Cc: Markus Armbruster <arm...@redhat.com>
Acked-by: Dr. David Alan Gilbert <d...@treblig.org>
Reviewed-by: Fabiano Rosas <faro...@suse.de>
Link: https://lore.kernel.org/r/20250613141217.474825-15-pet...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: beeac2df5ff0850299e58f4ad27f83dae64c54df
      
https://github.com/qemu/qemu/commit/beeac2df5ff0850299e58f4ad27f83dae64c54df
  Author: Juraj Marcin <jmar...@redhat.com>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M docs/devel/migration/vfio.rst
    M hw/vfio/migration-multifd.c
    M hw/vfio/migration-multifd.h
    M hw/vfio/migration.c
    M include/migration/misc.h
    M include/migration/register.h
    M include/qemu/typedefs.h
    M migration/multifd-device-state.c
    M migration/savevm.c

  Log Message:
  -----------
  migration: Rename save_live_complete_precopy_thread to 
save_complete_precopy_thread

Recent patch [1] renames the save_live_complete_precopy handler to
save_complete, as the machine is not live in most cases when this
handler is executed. The same is true also for
save_live_complete_precopy_thread, therefore this patch removes the
"live" keyword from the handler itself and related types to keep the
naming unified.

In contrast to save_complete, this handler is only executed at the end
of precopy, therefore the "precopy" keyword is retained.

[1]: https://lore.kernel.org/all/20250613140801.474264-7-pet...@redhat.com/

Cc: Alex Williamson <alex.william...@redhat.com>
Cc: Cédric Le Goater <c...@redhat.com>
Signed-off-by: Juraj Marcin <jmar...@redhat.com>
Link: https://lore.kernel.org/r/20250626085235.294690-1-jmar...@redhat.com
Signed-off-by: Peter Xu <pet...@redhat.com>
Signed-off-by: Fabiano Rosas <faro...@suse.de>


  Commit: c86da2b1dd7589d414b5a2d1e5361d6c3b4ca885
      
https://github.com/qemu/qemu/commit/c86da2b1dd7589d414b5a2d1e5361d6c3b4ca885
  Author: Richard Henderson <richard.hender...@linaro.org>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M include/tcg/tcg.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Use uintptr_t in tcg_malloc implementation

Avoid ubsan failure with clang-20,
  tcg.h:715:19: runtime error: applying non-zero offset 64 to null pointer
by not using pointers.

Acked-by: Ilya Leoshkevich <i...@linux.ibm.com>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: d6390204c61e148488f034d1f79be35cd3318d93
      
https://github.com/qemu/qemu/commit/d6390204c61e148488f034d1f79be35cd3318d93
  Author: Peter Maydell <peter.mayd...@linaro.org>
  Date:   2025-07-11 (Fri, 11 Jul 2025)

  Changed paths:
    M linux-user/syscall.c

  Log Message:
  -----------
  linux-user: Use qemu_set_cloexec() to mark pidfd as FD_CLOEXEC

In the linux-user do_fork() function we try to set the FD_CLOEXEC
flag on a pidfd like this:

    fcntl(pid_fd, F_SETFD, fcntl(pid_fd, F_GETFL) | FD_CLOEXEC);

This has two problems:
 (1) it doesn't check errors, which Coverity complains about
 (2) we use F_GETFL when we mean F_GETFD

Deal with both of these problems by using qemu_set_cloexec() instead.
That function will assert() if the fcntls fail, which is fine (we are
inside fork_start()/fork_end() so we know nothing can mess around
with our file descriptors here, and we just got this one from
pidfd_open()).

(As we are touching the if() statement here, we correct the
indentation.)

Coverity: CID 1508111
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-ID: <20250711141217.1429412-1-peter.mayd...@linaro.org>


  Commit: 43ec52b4c875f23ab041dd3de906cfacbd0d1a9d
      
https://github.com/qemu/qemu/commit/43ec52b4c875f23ab041dd3de906cfacbd0d1a9d
  Author: Stefan Hajnoczi <stefa...@redhat.com>
  Date:   2025-07-13 (Sun, 13 Jul 2025)

  Changed paths:
    M hw/intc/loongarch_extioi.c
    M hw/intc/loongarch_extioi_common.c
    M include/hw/intc/loongarch_extioi.h
    M include/hw/intc/loongarch_extioi_common.h
    M target/loongarch/tcg/csr_helper.c
    M target/loongarch/tcg/tlb_helper.c

  Log Message:
  -----------
  Merge tag 'pull-loongarch-20250711' of https://github.com/bibo-mao/qemu into 
staging

loongarch queue

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# gpg: Signature made Fri 11 Jul 2025 02:47:32 EDT
# gpg:                using EDDSA key 0D8642A3A2659F80B0B3D1A41F7B0C1251ACE7D1
# gpg: Good signature from "bibo mao <maob...@loongson.cn>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7044 3A00 19C0 E97A 31C7  13C4 8E86 8FB7 A176 9D4C
#      Subkey fingerprint: 0D86 42A3 A265 9F80 B0B3  D1A4 1F7B 0C12 51AC E7D1

* tag 'pull-loongarch-20250711' of https://github.com/bibo-mao/qemu:
  target/loongarch: Remove unnecessary page size validity checking
  target/loongarch: Fix CSR STLBPS register write emulation
  target/loongarch: Correct spelling in helper_csrwr_pwcl()
  hw/intc/loongarch_extioi: Move unrealize function to common code

Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com>


  Commit: 3adbf0bb8a78f17a1e9390b59e51eb1a47d8ac98
      
https://github.com/qemu/qemu/commit/3adbf0bb8a78f17a1e9390b59e51eb1a47d8ac98
  Author: Stefan Hajnoczi <stefa...@redhat.com>
  Date:   2025-07-13 (Sun, 13 Jul 2025)

  Changed paths:
    M MAINTAINERS
    M hw/s390x/s390-pci-bus.c
    M pc-bios/s390-ccw.img
    M pc-bios/s390-ccw/Makefile
    M pc-bios/s390-ccw/menu.c
    M pc-bios/s390-ccw/netmain.c
    M pc-bios/s390-ccw/s390-ccw.h
    M target/s390x/cpu-system.c
    M target/s390x/helper.c
    M target/s390x/kvm/kvm.c
    M target/s390x/s390x-internal.h
    M target/s390x/tcg/mem_helper.c
    M tests/functional/meson.build
    M tests/functional/test_ppc_bamboo.py
    A tests/functional/test_s390x_pxelinux.py

  Log Message:
  -----------
  Merge tag 'pull-request-2025-07-11' of https://gitlab.com/thuth/qemu into 
staging

* s390x: Allow to select different entries when booting via pxelinux.cfg
* Link s390-ccw.img statically
* Fix broken bamboo functional test
* s390x code cleanups and refactorings

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# gpg: Signature made Fri 11 Jul 2025 05:32:29 EDT
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "th...@redhat.com"
# gpg: Good signature from "Thomas Huth <th.h...@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <th...@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <h...@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.h...@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2025-07-11' of https://gitlab.com/thuth/qemu:
  target/s390x: Have s390_cpu_halt() not return anything
  target/s390x: Expose s390_count_running_cpus() method
  target/s390x: Remove unused s390_cpu_[un]halt() user stubs
  tests/functional/test_ppc_bamboo: Replace broken link with working assets
  tests/functional: Add dependency to the keymap_targets
  pc-bios: Update the s390 bios images with the pxelinux.cfg loadparm changes
  pc-bios/s390-ccw: link statically
  tests/functional: Add a test for s390x pxelinux.cfg network booting
  pc-bios/s390-ccw: Add a boot menu for booting via pxelinux.cfg
  pc-bios/s390-ccw: Make get_boot_index() from menu.c global
  pc-bios/s390-ccw: Allow up to 31 entries for pxelinux.cfg
  pc-bios/s390-ccw: Allow to select a different pxelinux.cfg entry via loadparm
  hw/s390x/s390-pci-bus.c: Use g_assert_not_reached() in functions taking an ett
  target/s390x/tcg: Use vaddr in s390_probe_access()
  target/s390x/kvm: Use vaddr in find/insert_hw_breakpoint()

Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com>


  Commit: 0edc2afe0c8197bbcb98f948c609fb74c9b1ffd5
      
https://github.com/qemu/qemu/commit/0edc2afe0c8197bbcb98f948c609fb74c9b1ffd5
  Author: Stefan Hajnoczi <stefa...@redhat.com>
  Date:   2025-07-13 (Sun, 13 Jul 2025)

  Changed paths:
    A docs/system/arm/max78000.rst
    M docs/system/arm/virt.rst
    M docs/system/devices/cxl.rst
    M docs/system/target-arm.rst
    M hw/acpi/cxl.c
    M hw/arm/Kconfig
    M hw/arm/fsl-imx8mp.c
    A hw/arm/max78000_soc.c
    A hw/arm/max78000fthr.c
    M hw/arm/meson.build
    M hw/arm/virt-acpi-build.c
    M hw/arm/virt.c
    M hw/char/Kconfig
    A hw/char/max78000_uart.c
    M hw/char/meson.build
    M hw/cxl/cxl-host-stubs.c
    M hw/cxl/cxl-host.c
    M hw/i386/pc.c
    M hw/intc/arm_gicv3_common.c
    M hw/intc/arm_gicv3_kvm.c
    M hw/intc/armv7m_nvic.c
    M hw/misc/Kconfig
    A hw/misc/max78000_aes.c
    A hw/misc/max78000_gcr.c
    A hw/misc/max78000_icc.c
    A hw/misc/max78000_trng.c
    M hw/misc/meson.build
    A include/hw/arm/max78000_soc.h
    M include/hw/arm/virt.h
    A include/hw/char/max78000_uart.h
    M include/hw/cxl/cxl.h
    M include/hw/cxl/cxl_host.h
    M include/hw/intc/arm_gicv3_common.h
    A include/hw/misc/max78000_aes.h
    A include/hw/misc/max78000_gcr.h
    A include/hw/misc/max78000_icc.h
    A include/hw/misc/max78000_trng.h
    M system/qdev-monitor.c
    A target/arm/cpregs-pmu.c
    M target/arm/cpregs.h
    M target/arm/cpu-sysregs.h.inc
    M target/arm/cpu.h
    M target/arm/cpu64.c
    M target/arm/helper.c
    M target/arm/internals.h
    M target/arm/kvm-stub.c
    M target/arm/kvm.c
    M target/arm/kvm_arm.h
    M target/arm/meson.build
    M target/arm/tcg-stubs.c
    A target/arm/tcg/cpregs-at.c
    M target/arm/tcg/cpu-v7m.c
    M target/arm/tcg/cpu32.c
    M target/arm/tcg/cpu64.c
    M target/arm/tcg/helper-a64.c
    M target/arm/tcg/helper.h
    M target/arm/tcg/meson.build
    M target/arm/tcg/vec_helper.c
    M tests/functional/meson.build
    A tests/functional/test_arm_max78000fthr.py
    M tests/qtest/cxl-test.c
    M tests/qtest/meson.build

  Log Message:
  -----------
  Merge tag 'pull-target-arm-20250711' of https://gitlab.com/pm215/qemu into 
staging

target-arm queue:
 * New board type max78000fthr
 * Enable use of CXL on Arm 'virt' board
 * Some more tidyup of ID register handling
 * Refactor AT insns and PMU regs into separate source files
 * Don't enforce NSE,NS check for EL3->EL3 returns
 * hw/arm/fsl-imx8mp: Wire VIRQ and VFIQ
 * Allow nested-virtualization with KVM on the 'virt' board
 * system/qdev: Remove pointless NULL check in qdev_device_add_from_qdict
 * hw/arm/virt-acpi-build: Don't create ITS id mappings by default
 * target/arm: Remove unused helper_sme2_luti4_4b

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# gpg:                issuer "peter.mayd...@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.mayd...@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmayd...@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmayd...@chiark.greenend.org.uk>" 
[full]
# gpg:                 aka "Peter Maydell <pe...@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20250711' of https://gitlab.com/pm215/qemu: (36 commits)
  tests/functional: Add a test for the MAX78000 arm machine
  docs/system: arm: Add max78000 board description
  target/arm: Remove helper_sme2_luti4_4b
  hw/arm/virt-acpi-build: Don't create ITS id mappings by default
  system/qdev: Remove pointless NULL check in qdev_device_add_from_qdict
  hw/arm/virt: Allow virt extensions with KVM
  hw/arm/arm_gicv3_kvm: Add a migration blocker with kvm nested virt
  target/arm: Enable feature ARM_FEATURE_EL2 if EL2 is supported
  target/arm/kvm: Add helper to detect EL2 when using KVM
  hw/arm: Allow setting KVM vGIC maintenance IRQ
  hw/arm/fsl-imx8mp: Wire VIRQ and VFIQ
  target/arm: Don't enforce NSE,NS check for EL3->EL3 returns
  target/arm: Split out performance monitor regs to cpregs-pmu.c
  target/arm: Split out AT insns to tcg/cpregs-at.c
  target/arm: Drop stub for define_tlb_insn_regs
  arm/kvm: shorten one overly long line
  arm/cpu: store clidr into the idregs array
  arm/cpu: fix trailing ',' for SET_IDREG
  arm/cpu: store id_aa64afr{0,1} into the idregs array
  arm/cpu: store id_afr0 into the idregs array
  ...

Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com>


  Commit: 52af79811f0f0d38b8e99d2df68a3a14d79353ca
      
https://github.com/qemu/qemu/commit/52af79811f0f0d38b8e99d2df68a3a14d79353ca
  Author: Stefan Hajnoczi <stefa...@redhat.com>
  Date:   2025-07-13 (Sun, 13 Jul 2025)

  Changed paths:
    M docs/devel/migration/main.rst
    M docs/devel/migration/postcopy.rst
    M docs/devel/migration/vfio.rst
    M hw/ppc/spapr.c
    M hw/s390x/s390-stattrib.c
    M hw/vfio/migration-multifd.c
    M hw/vfio/migration-multifd.h
    M hw/vfio/migration.c
    M include/migration/misc.h
    M include/migration/register.h
    M include/qemu/typedefs.h
    M migration/block-dirty-bitmap.c
    M migration/migration-hmp-cmds.c
    M migration/migration.c
    M migration/migration.h
    M migration/multifd-device-state.c
    M migration/options.c
    M migration/postcopy-ram.c
    M migration/postcopy-ram.h
    M migration/ram.c
    M migration/savevm.c
    M migration/trace-events
    M qapi/migration.json
    M tests/qtest/migration/migration-qmp.c

  Log Message:
  -----------
  Merge tag 'migration-20250711-pull-request' of 
https://gitlab.com/farosas/qemu into staging

Migration pull request

- General cleanups around: postcopy, bg-snapshot, migration hooks,
  migration completion and formatting of 'info migrate'.

- Overhaul of postcopy blocktime tracking.

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# gpg: Signature made Fri 11 Jul 2025 10:04:08 EDT
# gpg:                using RSA key AA1B48B0A22326A5A4C364CFC798DC741BEC319D
# gpg:                issuer "faro...@suse.de"
# gpg: Good signature from "Fabiano Rosas <faro...@suse.de>" [unknown]
# gpg:                 aka "Fabiano Almeida Rosas <fabiano.ro...@suse.com>" 
[unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: AA1B 48B0 A223 26A5 A4C3  64CF C798 DC74 1BEC 319D

* tag 'migration-20250711-pull-request' of https://gitlab.com/farosas/qemu: (26 
commits)
  migration: Rename save_live_complete_precopy_thread to 
save_complete_precopy_thread
  migration/postcopy: Add latency distribution report for blocktime
  migration/postcopy: blocktime allows track / report non-vCPU faults
  migration/postcopy: Optimize blocktime fault tracking with hashtable
  migration/postcopy: Cleanup the total blocktime accounting
  migration/postcopy: Cache the tid->vcpu mapping for blocktime
  migration/postcopy: Initialize blocktime context only until listen
  migration/postcopy: Report fault latencies in blocktime
  migration/postcopy: Add blocktime fault counts per-vcpu
  migration/postcopy: Bring blocktime layer to ns level
  migration/postcopy: Drop PostcopyBlocktimeContext.start_time
  migration/postcopy: Make all blocktime vars 64bits
  migration/postcopy: Drop all atomic ops in blocktime feature
  migration/postcopy: Push blocktime start/end into page req mutex
  migration: Add option to set postcopy-blocktime
  migration/postcopy: Avoid clearing dirty bitmap for postcopy too
  migration: Rewrite the migration complete detect logic
  migration/ram: Add tracepoints for ram_save_complete()
  migration/ram: One less indent for ram_find_and_save_block()
  migration: qemu_savevm_complete*() helpers
  ...

Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com>


  Commit: 9a4e273ddec3927920c5958d2226c6b38b543336
      
https://github.com/qemu/qemu/commit/9a4e273ddec3927920c5958d2226c6b38b543336
  Author: Stefan Hajnoczi <stefa...@redhat.com>
  Date:   2025-07-13 (Sun, 13 Jul 2025)

  Changed paths:
    M fpu/softfloat-parts.c.inc
    M fpu/softfloat.c
    M include/tcg/tcg.h
    M linux-user/fd-trans.h
    M linux-user/gen-vdso.c
    M linux-user/main.c
    M linux-user/mips/target_signal.h
    M linux-user/syscall.c
    M linux-user/syscall_defs.h
    M tcg/tcg.c
    M tests/tcg/multiarch/Makefile.target
    A tests/tcg/multiarch/fnmsub.c

  Log Message:
  -----------
  Merge tag 'pull-tcg-20250711' of https://gitlab.com/rth7680/qemu into staging

fpu: Process float_muladd_negate_result after rounding
tcg: Use uintptr_t in tcg_malloc implementation
linux-user: Hold the fd-trans lock across fork
linux-user: Implement fchmodat2 syscall
linux-user: Check for EFAULT failure in nanosleep
linux-user: Use qemu_set_cloexec() to mark pidfd as FD_CLOEXEC
linux-user/gen-vdso: Handle fseek() failure
linux-user/gen-vdso: Don't read off the end of buf[]

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# gpg: Signature made Fri 11 Jul 2025 13:21:13 EDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.hender...@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.hender...@linaro.org>" 
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20250711' of https://gitlab.com/rth7680/qemu:
  linux-user: Use qemu_set_cloexec() to mark pidfd as FD_CLOEXEC
  tcg: Use uintptr_t in tcg_malloc implementation
  linux-user: Hold the fd-trans lock across fork
  linux-user/mips/o32: Drop sa_restorer functionality
  linux-user/gen-vdso: Don't read off the end of buf[]
  linux-user/gen-vdso: Handle fseek() failure
  linux-user: Check for EFAULT failure in nanosleep
  linux-user: Implement fchmodat2 syscall
  fpu: Process float_muladd_negate_result after rounding

Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com>


Compare: https://github.com/qemu/qemu/compare/93863fdc3933...9a4e273ddec3

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