Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 798a04bbe5eb9cfee83baf5ae19fd745444ddfec
https://github.com/qemu/qemu/commit/798a04bbe5eb9cfee83baf5ae19fd745444ddfec
Author: Gustavo Romero <gustavo.rom...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M target/arm/internals.h
M target/arm/ptw.c
Log Message:
-----------
target/arm: Clean up of register field definitions
Clean up the definitions of NSW and NSA fields in the VTCR register.
These two fields are already defined properly using FIELD() so they are
actually duplications. Also, define the NSW and NSA fields in the
VSTCR register using FIELD() and remove their definitions based on VTCR
fields.
Signed-off-by: Gustavo Romero <gustavo.rom...@linaro.org>
Message-id: 20250725014755.2122579-1-gustavo.rom...@linaro.org
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: 8272082fe2b2b84bba80946510ea6111160cfdea
https://github.com/qemu/qemu/commit/8272082fe2b2b84bba80946510ea6111160cfdea
Author: Pierrick Bouvier <pierrick.bouv...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M tests/functional/aarch64/test_device_passthrough.py
Log Message:
-----------
tests/functional/test_aarch64_device_passthrough: update image
TF-A needs to be patched to enable support for FEAT_TCR2 and
FEAT_SCTLR2. This new image contains updated firmware.
Signed-off-by: Pierrick Bouvier <pierrick.bouv...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-id: 20250727074202.83141-2-richard.hender...@linaro.org
Message-ID: <20250719035838.2284029-2-pierrick.bouv...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: 70a9747bb23184c1c71f791f73e5e0f34619a404
https://github.com/qemu/qemu/commit/70a9747bb23184c1c71f791f73e5e0f34619a404
Author: Pierrick Bouvier <pierrick.bouv...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M tests/functional/aarch64/test_rme_sbsaref.py
M tests/functional/aarch64/test_rme_virt.py
Log Message:
-----------
tests/functional/test_aarch64_rme: update image
TF-A needs to be patched to enable support for FEAT_TCR2 and
FEAT_SCTLR2. This new image contains updated firmware.
Signed-off-by: Pierrick Bouvier <pierrick.bouv...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Tested-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-id: 20250727074202.83141-3-richard.hender...@linaro.org
Message-ID: <20250719035838.2284029-3-pierrick.bouv...@linaro.org>
[PMM: switch to os.makedirs(..., exist_ok=True) to improve
robustness when re-run after test was cancelled midway]
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: d117049c19ac55a349bcb45c16e0cbe006f0d4b9
https://github.com/qemu/qemu/commit/d117049c19ac55a349bcb45c16e0cbe006f0d4b9
Author: Gustavo Romero <gustavo.rom...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M docs/system/arm/emulation.rst
M target/arm/cpu-features.h
M target/arm/cpu.c
M target/arm/cpu.h
M target/arm/helper.c
M target/arm/internals.h
M target/arm/tcg/cpu64.c
Log Message:
-----------
target/arm: Implement FEAT_SCTLR2 and enable with -cpu max
Add FEAT_SCTLR2, which introduces the SCTLR2_EL1, SCTLR2_EL2, and
SCTLR2_EL3 registers. These registers are extensions of the SCTLR_ELx
ones.
Signed-off-by: Gustavo Romero <gustavo.rom...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-id: 20250727074202.83141-4-richard.hender...@linaro.org
Message-ID: <20250711140828.1714666-4-gustavo.rom...@linaro.org>
[rth: Remove FEAT_MEC code; handle SCR and HCRX enable bits.]
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: ecb000eba258465b603268c092001fa5d765c180
https://github.com/qemu/qemu/commit/ecb000eba258465b603268c092001fa5d765c180
Author: Gustavo Romero <gustavo.rom...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M docs/system/arm/emulation.rst
M target/arm/cpu-features.h
M target/arm/cpu.c
M target/arm/cpu.h
M target/arm/helper.c
M target/arm/internals.h
M target/arm/tcg/cpu64.c
Log Message:
-----------
target/arm: Implement FEAT_TCR2 and enable with -cpu max
Add FEAT_TCR2, which introduces the TCR2_EL1 and TCR2_EL2 registers.
These registers are extensions of the TCR_ELx registers and provide
top-level control of the EL10 and EL20 translation regimes.
Signed-off-by: Gustavo Romero <gustavo.rom...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-id: 20250727074202.83141-5-richard.hender...@linaro.org
Message-ID: <20250711140828.1714666-5-gustavo.rom...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
[rth: Remove FEAT_MEC code; handle SCR and HCRX enable bits.]
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: 253e90884a89a6bdec5a1b71a8ebe70a8ebf6425
https://github.com/qemu/qemu/commit/253e90884a89a6bdec5a1b71a8ebe70a8ebf6425
Author: Steve Sistare <steven.sist...@oracle.com>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M hw/intc/arm_gicv3_kvm.c
M include/hw/intc/arm_gicv3_common.h
Log Message:
-----------
hw/intc/arm_gicv3_kvm: preserve pending interrupts during cpr
Close a race condition that causes cpr-transfer to lose VFIO
interrupts on ARM.
CPR stops VCPUs but does not disable VFIO interrupts, which may continue
to arrive throughout the transition to new QEMU.
CPR calls kvm_irqchip_remove_irqfd_notifier_gsi in old QEMU to force
future interrupts to the producer eventfd, where they are preserved.
Old QEMU then destroys the old KVM instance. However, interrupts may
already be pending in KVM state. To preserve them, call ioctl
KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES to flush them to guest RAM, where
they will be picked up when the new KVM+VCPU instance is created.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Steve Sistare <steven.sist...@oracle.com>
Reviewed-by: Fabiano Rosas <faro...@suse.de>
Message-id: 1754936384-278328-1-git-send-email-steven.sist...@oracle.com
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: 859061b2c34cbcc98be6da29738b9bc6c249ac74
https://github.com/qemu/qemu/commit/859061b2c34cbcc98be6da29738b9bc6c249ac74
Author: Smail AIDER <smail.ai...@huawei.com>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M target/arm/cpregs-pmu.c
Log Message:
-----------
target/arm: Trap PMCR when MDCR_EL2.TPMCR is set
Trap PMCR_EL0 or PMCR accesses to EL2 when MDCR_EL2.TPMCR is set.
Similar to MDCR_EL2.TPM, MDCR_EL2.TPMCR allows trapping EL0 and EL1
accesses to the PMCR register to EL2.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Smail AIDER <smail.ai...@huawei.com>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-id: 20250811112143.1577055-2-smail.ai...@huawei.com
Message-Id: <20250722131925.2119169-1-smail.ai...@huawei.com>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: ac2f79b7d701079aa652bccc175a3503c51fc7f8
https://github.com/qemu/qemu/commit/ac2f79b7d701079aa652bccc175a3503c51fc7f8
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M target/arm/cpu-features.h
Log Message:
-----------
target/arm: Add feature predicate for FEAT_CSSC
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250803014019.416797-2-richard.hender...@linaro.org
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: 37a45825ce984a1a89acfbadafd8c9f58b8e55a0
https://github.com/qemu/qemu/commit/37a45825ce984a1a89acfbadafd8c9f58b8e55a0
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M target/arm/tcg/a64.decode
M target/arm/tcg/translate-a64.c
Log Message:
-----------
target/arm: Implement MIN/MAX (immediate)
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250803014019.416797-3-richard.hender...@linaro.org
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: db9aadaf1141a83b1a730117fecea619ca16b22e
https://github.com/qemu/qemu/commit/db9aadaf1141a83b1a730117fecea619ca16b22e
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M target/arm/tcg/a64.decode
M target/arm/tcg/translate-a64.c
Log Message:
-----------
target/arm: Implement MIN/MAX (register)
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250803014019.416797-4-richard.hender...@linaro.org
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: 59478b4a6883defdc1b3013552b2a93bb0c1e304
https://github.com/qemu/qemu/commit/59478b4a6883defdc1b3013552b2a93bb0c1e304
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M target/arm/tcg/translate-a64.c
Log Message:
-----------
target/arm: Split out gen_wrap2_i32 helper
Wrapper to extract the low 32 bits, perform an operation,
and zero-extend back to 64 bits.
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250803014019.416797-5-richard.hender...@linaro.org
[PMM: fixed wrong output-reg argument in callsites; add comment]
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: 8881d11e7c3335a9c2d655d4c56b5232fb7e479e
https://github.com/qemu/qemu/commit/8881d11e7c3335a9c2d655d4c56b5232fb7e479e
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M target/arm/tcg/a64.decode
M target/arm/tcg/translate-a64.c
Log Message:
-----------
target/arm: Implement CTZ, CNT, ABS
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250803014019.416797-6-richard.hender...@linaro.org
[PMM: fix tcg_rd/tcg_rn mixup]
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: 6843e65b47499fda13040c780115fe0bf70ab1e5
https://github.com/qemu/qemu/commit/6843e65b47499fda13040c780115fe0bf70ab1e5
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M docs/system/arm/emulation.rst
M linux-user/aarch64/elfload.c
M target/arm/tcg/cpu64.c
Log Message:
-----------
target/arm: Enable FEAT_CSSC for -cpu max
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250803014019.416797-7-richard.hender...@linaro.org
[PMM: rebased to handle linux-user elfload.c refactor]
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: 07cda56a59168b1c85bdbd11d62a32c64f685bb7
https://github.com/qemu/qemu/commit/07cda56a59168b1c85bdbd11d62a32c64f685bb7
Author: Manos Pitsidianakis <manos.pitsidiana...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M hw/arm/boot.c
M hw/arm/virt.c
Log Message:
-----------
hw/arm: add static NVDIMMs in device tree
NVDIMM is used for fast rootfs with EROFS, for example by kata
containers. To allow booting with static NVDIMM memory, add them to the
device tree in arm virt machine.
This allows users to boot directly with nvdimm memory devices without
having to rely on ACPI and hotplug.
Verified to work with command invocation:
./qemu-system-aarch64 \
-M virt,nvdimm=on \
-cpu cortex-a57 \
-m 4G,slots=2,maxmem=8G \
-object
memory-backend-file,id=mem1,share=on,mem-path=/tmp/nvdimm,size=4G,readonly=off \
-device nvdimm,id=nvdimm1,memdev=mem1,unarmed=off \
-drive file=./debian-12-nocloud-arm64-commited.qcow2,format=qcow2 \
-kernel ./vmlinuz-6.1.0-13-arm64 \
-append "root=/dev/vda1 console=ttyAMA0,115200 acpi=off"
-initrd ./initrd.img-6.1.0-13-arm64 \
-nographic \
-serial mon:stdio
Signed-off-by: Manos Pitsidianakis <manos.pitsidiana...@linaro.org>
Message-id: 20250807-nvdimm_arm64_virt-v2-1-b8054578b...@linaro.org
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: 1a4f10e4df9b6f3af1d8645b74b62a9530fe1b87
https://github.com/qemu/qemu/commit/1a4f10e4df9b6f3af1d8645b74b62a9530fe1b87
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M scripts/kernel-doc
Log Message:
-----------
scripts/kernel-doc: Avoid new Perl precedence warning
Newer versions of Perl (5.41.x and up) emit a warning for code in
kernel-doc:
Possible precedence problem between ! and pattern match (m//) at
/scripts/kernel-doc line 1597.
This is because the code does:
if (!$param =~ /\w\.\.\.$/) {
In Perl, the ! operator has higher precedence than the =~
pattern-match binding, so the effect of this condition is to first
logically-negate the string $param into a true-or-false value and
then try to pattern match it against the regex, which in this case
will always fail. This is almost certainly not what the author
intended.
In the new Python version of kernel-doc in the Linux kernel,
the equivalent code is written:
if KernRe(r'\w\.\.\.$').search(param):
# For named variable parameters of the form `x...`,
# remove the dots
param = param[:-3]
else:
# Handles unnamed variable parameters
param = "..."
which is a more sensible way of writing the behaviour you would
get if you put in brackets to make the regex match first and
then negate the result.
Take this as the intended behaviour, and update the Perl to match.
For QEMU, this produces no change in output, presumably because we
never used the "unnamed variable parameters" syntax.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Daniel P. Berrangé <berra...@redhat.com>
Reviewed-by: Mauro Carvalho Chehab <mchehab+hua...@kernel.org>
Message-id: 20250819115648.2125709-1-peter.mayd...@linaro.org
Commit: 5e69ec7ca870c760814de54b0dd2e1f6d7a1d502
https://github.com/qemu/qemu/commit/5e69ec7ca870c760814de54b0dd2e1f6d7a1d502
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M docs/sphinx/kerneldoc.py
Log Message:
-----------
docs/sphinx/kerneldoc.py: Handle new LINENO syntax
The new upstream kernel-doc that we plan to update to uses a different
syntax for the LINENO directives that the Sphinx extension parses:
instead of
#define LINENO 86
it has
.. LINENO 86
Update the kerneldoc.py extension to handle both syntaxes, so
that it will work with both the old and the new kernel-doc.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Paolo Bonzini <pbonz...@redhat.com>
Reviewed-by: Mauro Carvalho Chehab <mchehab+hua...@kernel.org>
Message-id: 20250814171324.1614516-2-peter.mayd...@linaro.org
Commit: 4a7a6625fdc5a280781794ec174272621733913f
https://github.com/qemu/qemu/commit/4a7a6625fdc5a280781794ec174272621733913f
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M tests/qtest/libqtest.h
Log Message:
-----------
tests/qtest/libqtest.h: Remove stray space from doc comment
The doc comment for qtest_cb_for_every_machine has a stray
space at the start of its description, which makes kernel-doc
think that this line is part of the documentation of the
skip_old_versioned argument. The result is that the HTML
doesn't have a "Description" section and the text is instead
put in the wrong place.
Remove the stray space.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Paolo Bonzini <pbonz...@redhat.com>
Reviewed-by: Mauro Carvalho Chehab <mchehab+hua...@kernel.org>
Message-id: 20250814171324.1614516-3-peter.mayd...@linaro.org
Commit: 578ac437cfa639cb83b5531d7398e2213c15f80e
https://github.com/qemu/qemu/commit/578ac437cfa639cb83b5531d7398e2213c15f80e
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
A scripts/kernel-doc.py
A scripts/lib/kdoc/kdoc_files.py
A scripts/lib/kdoc/kdoc_item.py
A scripts/lib/kdoc/kdoc_output.py
A scripts/lib/kdoc/kdoc_parser.py
A scripts/lib/kdoc/kdoc_re.py
Log Message:
-----------
scripts: Import Python kerneldoc from Linux kernel
We last synced our copy of kerneldoc with Linux back in 2020. In the
interim, upstream has entirely rewritten the script in Python, and
the new Python version is split into a main script plus some
libraries in the kernel's scripts/lib/kdoc.
Import all these files. These are the versions as of kernel commit
0cc53520e68be, with no local changes.
We use the same lib/kdoc/ directory as the kernel does here, so we
can avoid having to edit the top-level script just to adjust a
pathname, even though it is probably not the naming we would have
picked if this was a purely QEMU script.
The Sphinx conf.py still points at the Perl version of the script,
so this Python code will not be invoked to build the docs yet.
NB: checkpatch complains about many things in this commit,
including the use of "GPL-2.0" rather than "GPL-2.0-only" in
the SPDX tags, but since this is a third party import we can
ignore this.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Paolo Bonzini <pbonz...@redhat.com>
Reviewed-by: Mauro Carvalho Chehab <mchehab+hua...@kernel.org>
Message-id: 20250814171324.1614516-4-peter.mayd...@linaro.org
Commit: b19bfaa58a67dca9ed2d760326d2756056367c7e
https://github.com/qemu/qemu/commit/b19bfaa58a67dca9ed2d760326d2756056367c7e
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M scripts/lib/kdoc/kdoc_parser.py
Log Message:
-----------
scripts/kernel-doc: strip QEMU_ from function definitions
This commit is the Python version of our older commit
b30df2751e5 ("scripts/kernel-doc: strip QEMU_ from function definitions").
Some versions of Sphinx get confused if function attributes are
left on the C code from kernel-doc; strip out any QEMU_* prefixes
from function prototypes.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Paolo Bonzini <pbonz...@redhat.com>
Reviewed-by: Mauro Carvalho Chehab <mchehab+hua...@kernel.org>
Message-id: 20250814171324.1614516-5-peter.mayd...@linaro.org
Commit: a2a04c83b6de2c530409b81b18f0995789da8698
https://github.com/qemu/qemu/commit/a2a04c83b6de2c530409b81b18f0995789da8698
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M scripts/lib/kdoc/kdoc_output.py
Log Message:
-----------
scripts/kernel-doc: tweak for QEMU coding standards
This commit makes the equivalent changes to the Python script that we
had for the old Perl script in commit 4cf41794411f ("docs: tweak
kernel-doc for QEMU coding standards"). To repeat the rationale from
that commit:
Surprisingly, QEMU does have a pretty consistent doc comment style and
it is not very different from the Linux kernel's. Of the documentation
"sigils", only "#" separates the QEMU doc comment style from Linux's,
and it has 200+ instances vs. 6 for the kernel's '&struct foo' (all in
accel/tcg/translate-all.c), so it's clear that the two standards are
different in this respect. In addition, our structs are typedefed and
recognized by CamelCase names.
Note that in 4cf41794411f we used '(?!)' as our type_fallback regex;
this is strictly not quite a replacement for the upstream
'\&([_\w]+)', because the latter includes a group that can later be
matched with \1, and the former does not. The old perl script did
not care about this, but the python version does, so we must include
the extra set of brackets to ensure we have a group.
This commit does not include all the same changes that 4cf41794411f
did. Of the missing pieces, some had already gone in an earlier
kernel-doc update; the parts we still had but do not include here are:
@@ -2057,7 +2060,7 @@
}
elsif (/$doc_decl/o) {
$identifier = $1;
- if (/\s*([\w\s]+?)(\(\))?\s*-/) {
+ if (/\s*([\w\s]+?)(\s*-|:)/) {
$identifier = $1;
}
@@ -2067,7 +2070,7 @@
$contents = "";
$section = $section_default;
$new_start_line = $. + 1;
- if (/-(.*)/) {
+ if (/[-:](.*)/) {
# strip leading/trailing/multiple spaces
$descr= $1;
$descr =~ s/^\s*//;
The second of these is already in the upstream version: the line r =
KernRe("[-:](.*)") in process_name() matches the regex we have. The
first change has been refactored into the doc_begin_data and
doc_begin_func changes. Since the output HTML for QEMU's
documentation has no relevant changes with the new kerneldoc, we
assume that this too has been handled upstream.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Paolo Bonzini <pbonz...@redhat.com>
Reviewed-by: Mauro Carvalho Chehab <mchehab+hua...@kernel.org>
Message-id: 20250814171324.1614516-6-peter.mayd...@linaro.org
Commit: 9df75ebaa9c2e17829150af0bd98c17587f313ca
https://github.com/qemu/qemu/commit/9df75ebaa9c2e17829150af0bd98c17587f313ca
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M docs/conf.py
M docs/sphinx/kerneldoc.py
Log Message:
-----------
scripts/kerneldoc: Switch to the Python kernel-doc script
Change the Sphinx config to run the new Python kernel-doc script
instead of the Perl one. The only difference between the two is that
the new script does not handle the -sphinx-version option, instead
assuming that Sphinx is always at least version 3: so we must
delete the code that passes that option to avoid the Python
script complaining about an unknown option.
QEMU's minimum Sphinx version is already 3.4.3, so this doesn't
change the set of versions we can handle.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Paolo Bonzini <pbonz...@redhat.com>
Reviewed-by: Mauro Carvalho Chehab <mchehab+hua...@kernel.org>
Message-id: 20250814171324.1614516-7-peter.mayd...@linaro.org
Commit: 5dcfb52dfa19d56ad87d20c01f695cf04d2bd148
https://github.com/qemu/qemu/commit/5dcfb52dfa19d56ad87d20c01f695cf04d2bd148
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M .editorconfig
R scripts/kernel-doc
Log Message:
-----------
scripts/kernel-doc: Delete the old Perl kernel-doc script
We can now delete the old Perl kernel-doc script. For posterity,
this is a complete diff of the local changes that we were carrying
between the kernel's Perl script as of kernel commit 72b97d0b911872ba
(the last time we synced it) and our local copy:
--- /tmp/kdoc 2025-08-14 10:42:47.620331939 +0100
+++ scripts/kernel-doc 2025-02-17 10:44:34.528421457 +0000
@@ -1,5 +1,5 @@
#!/usr/bin/env perl
-# SPDX-License-Identifier: GPL-2.0
+# SPDX-License-Identifier: GPL-2.0-only
use warnings;
use strict;
@@ -224,12 +224,12 @@
my $type_fp_param = '\@(\w+)\(\)'; # Special RST handling for func ptr params
my $type_fp_param2 = '\@(\w+->\S+)\(\)'; # Special RST handling for structs
with func ptr params
my $type_env = '(\$\w+)';
-my $type_enum = '\&(enum\s*([_\w]+))';
-my $type_struct = '\&(struct\s*([_\w]+))';
-my $type_typedef = '\&(typedef\s*([_\w]+))';
-my $type_union = '\&(union\s*([_\w]+))';
-my $type_member = '\&([_\w]+)(\.|->)([_\w]+)';
-my $type_fallback = '\&([_\w]+)';
+my $type_enum = '#(enum\s*([_\w]+))';
+my $type_struct = '#(struct\s*([_\w]+))';
+my $type_typedef = '#(([A-Z][_\w]*))';
+my $type_union = '#(union\s*([_\w]+))';
+my $type_member = '#([_\w]+)(\.|->)([_\w]+)';
+my $type_fallback = '(?!)'; # this never matches
my $type_member_func = $type_member . '\(\)';
# Output conversion substitutions.
@@ -1745,6 +1745,9 @@
)+
\)\)\s+//x;
+ # Strip QEMU specific compiler annotations
+ $prototype =~ s/QEMU_[A-Z_]+ +//;
+
# Yes, this truly is vile. We are looking for:
# 1. Return type (may be nothing if we're looking at a macro)
# 2. Function name
@@ -2057,7 +2060,7 @@
}
elsif (/$doc_decl/o) {
$identifier = $1;
- if (/\s*([\w\s]+?)(\(\))?\s*-/) {
+ if (/\s*([\w\s]+?)(\s*-|:)/) {
$identifier = $1;
}
@@ -2067,7 +2070,7 @@
$contents = "";
$section = $section_default;
$new_start_line = $. + 1;
- if (/-(.*)/) {
+ if (/[-:](.*)/) {
# strip leading/trailing/multiple spaces
$descr= $1;
$descr =~ s/^\s*//;
These changes correspond to:
06e2329636f license: Update deprecated SPDX tag GPL-2.0 to GPL-2.0-only
(a bulk change which we won't bother to re-apply to this third-party script)
b30df2751e5 scripts/kernel-doc: strip QEMU_ from function definitions
4cf41794411 docs: tweak kernel-doc for QEMU coding standards
We have already applied the equivalent of these changes to the
Python code in libs/kdoc/ in the preceding commits.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Mauro Carvalho Chehab <mchehab+hua...@kernel.org>
Reviewed-by: Paolo Bonzini <pbonz...@redhat.com>
Commit: 8ef4490304bdaac312c350c8d3010cf00c8f791e
https://github.com/qemu/qemu/commit/8ef4490304bdaac312c350c8d3010cf00c8f791e
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Put kernel-doc under the "docs build machinery" section
We never had a MAINTAINERS entry for the old kernel-doc script; add
the files for the new Python kernel-doc under "Sphinx documentation
configuration and build machinery", as the most appropriate
subsection.
Mauro has kindly volunteered to help with maintenance/review
of this area of the codebase, so add him as a maintainer.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Paolo Bonzini <pbonz...@redhat.com>
Reviewed-by: Mauro Carvalho Chehab <mchehab+hua...@kernel.org>
Message-id: 20250814171324.1614516-9-peter.mayd...@linaro.org
Commit: c2d2c89ac72b35d72c85d7c33265e5b14be95a03
https://github.com/qemu/qemu/commit/c2d2c89ac72b35d72c85d7c33265e5b14be95a03
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M target/arm/cpu-features.h
Log Message:
-----------
target/arm: Correct condition of aa64_atomics feature function
The ARMv8.1-Atomics feature (renamed FEAT_LSE in more modern versions
of the Arm ARM) has always ben indicated by ID_AA64ISAR0.ATOMIC being
0b0010 or greater; 0b0001 is a reserved unused value.
We were incorrectly checking for != 0; this had no harmful effects
because all the CPUs set their value for this field to either 0
(for not having the feature) or 2 (if they do have it), but it's
better to match what the architecture specifies here.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-id: 20250819145659.2165160-1-peter.mayd...@linaro.org
Commit: 301ad5ca928caea6316630da8dc94bd67c4d8c94
https://github.com/qemu/qemu/commit/301ad5ca928caea6316630da8dc94bd67c4d8c94
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
R host/include/aarch64/host/atomic128-cas.h
A host/include/aarch64/host/atomic128-cas.h.inc
Log Message:
-----------
qemu/atomic: Finish renaming atomic128-cas.h headers
The aarch64 header was not renamed with the others, meaning it
was skipped in favor of the generic version.
Cc: qemu-sta...@nongnu.org
Fixes: 15606965400b ("qemu/atomic: Rename atomic128-cas.h headers using .h.inc
suffix")
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250815122653.701782-2-richard.hender...@linaro.org
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: 7f98664125204f2d45164ff0d4fac7899b428daf
https://github.com/qemu/qemu/commit/7f98664125204f2d45164ff0d4fac7899b428daf
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M host/include/aarch64/host/atomic128-cas.h.inc
M host/include/generic/host/atomic128-cas.h.inc
Log Message:
-----------
qemu/atomic: Add atomic16 primitives for xchg, fetch_and, fetch_or
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250815122653.701782-3-richard.hender...@linaro.org
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: 68ba4b0f46bf68f8cda39a9871c15c3a619c219a
https://github.com/qemu/qemu/commit/68ba4b0f46bf68f8cda39a9871c15c3a619c219a
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M accel/tcg/atomic_template.h
M include/accel/tcg/cpu-ldst-common.h
Log Message:
-----------
accel/tcg: Add cpu_atomic_*_mmu for 16-byte xchg, fetch_and, fetch_or
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250815122653.701782-4-richard.hender...@linaro.org
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: dfc677ef11d14ed5991fd433989585084be63ce8
https://github.com/qemu/qemu/commit/dfc677ef11d14ed5991fd433989585084be63ce8
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M accel/tcg/atomic_common.c.inc
M accel/tcg/tcg-runtime.h
M include/tcg/tcg-op-common.h
M include/tcg/tcg-op.h
M tcg/tcg-op-ldst.c
Log Message:
-----------
tcg: Add tcg_gen_atomic_{xchg,fetch_and,fetch_or}_i128
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250815122653.701782-5-richard.hender...@linaro.org
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: 38a79176b34325b2a7e93e533376eaf22f913066
https://github.com/qemu/qemu/commit/38a79176b34325b2a7e93e533376eaf22f913066
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M linux-user/aarch64/elfload.c
M target/arm/cpu-features.h
M target/arm/tcg/translate-a64.c
Log Message:
-----------
target/arm: Rename isar_feature_aa64_atomics
This is FEAT_LSE -- rename the predicate to match.
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250815122653.701782-6-richard.hender...@linaro.org
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: aa297b6c431c7b42d524293b344de39b755c6101
https://github.com/qemu/qemu/commit/aa297b6c431c7b42d524293b344de39b755c6101
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M target/arm/cpu-features.h
M target/arm/tcg/a64.decode
M target/arm/tcg/translate-a64.c
Log Message:
-----------
target/arm: Implement FEAT_LSE128
This feature contains the LDCLRP, LDSETP, and SWPP instructions.
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250815122653.701782-7-richard.hender...@linaro.org
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: b9592ed25976989e4235d01ff87be6e92f44351e
https://github.com/qemu/qemu/commit/b9592ed25976989e4235d01ff87be6e92f44351e
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M docs/system/arm/emulation.rst
M linux-user/aarch64/elfload.c
M target/arm/tcg/cpu64.c
Log Message:
-----------
target/arm: Enable FEAT_LSE128 for -cpu max
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-id: 20250815122653.701782-8-richard.hender...@linaro.org
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Commit: fd0b04e944df2e308a95ce9933ca4c04b3875a11
https://github.com/qemu/qemu/commit/fd0b04e944df2e308a95ce9933ca4c04b3875a11
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M hw/arm/stm32f205_soc.c
M include/hw/arm/stm32f205_soc.h
Log Message:
-----------
hw/arm/stm32f205_soc: Don't leak TYPE_OR_IRQ objects
In stm32f250_soc_initfn() we mostly use the standard pattern
for child objects of calling object_initialize_child(). However
for s->adc_irqs we call object_new() and then later qdev_realize(),
and we never unref the object on deinit. This causes a leak,
detected by ASAN on the device-introspect-test:
Indirect leak of 10 byte(s) in 1 object(s) allocated from:
#0 0x5b9fc4789de3 in malloc
(/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/qemu-system-arm+0x21f1de3)
(BuildId: 267a2619a026ed91c78a07b1eb2ef15381538efe)
#1 0x740de3f28b09 in g_malloc
(/lib/x86_64-linux-gnu/libglib-2.0.so.0+0x62b09) (BuildId:
1eb6131419edb83b2178b682829a6913cf682d75)
#2 0x740de3f3e4d8 in g_strdup
(/lib/x86_64-linux-gnu/libglib-2.0.so.0+0x784d8) (BuildId:
1eb6131419edb83b2178b682829a6913cf682d75)
#3 0x5b9fc70159e1 in g_strdup_inline
/usr/include/glib-2.0/glib/gstrfuncs.h:321:10
#4 0x5b9fc70159e1 in object_property_try_add
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:1276:18
#5 0x5b9fc7015f94 in object_property_add
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:1294:12
#6 0x5b9fc701b900 in object_add_link_prop
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:2021:10
#7 0x5b9fc701b3fc in object_property_add_link
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:2037:12
#8 0x5b9fc4c299fb in qdev_init_gpio_out_named
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../hw/core/gpio.c:90:9
#9 0x5b9fc4c29b26 in qdev_init_gpio_out
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../hw/core/gpio.c:101:5
#10 0x5b9fc4c0f77a in or_irq_init
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../hw/core/or-irq.c:70:5
#11 0x5b9fc70257e1 in object_init_with_type
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:428:9
#12 0x5b9fc700cd4b in object_initialize_with_type
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:570:5
#13 0x5b9fc700e66d in object_new_with_type
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:774:5
#14 0x5b9fc700e750 in object_new
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:789:12
#15 0x5b9fc68b2162 in stm32f205_soc_initfn
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../hw/arm/stm32f205_soc.c:69:26
Switch to using object_initialize_child() like all our
other child objects for this SoC object.
Cc: qemu-sta...@nongnu.org
Fixes: b63041c8f6b ("STM32F205: Connect the ADC devices")
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-id: 20250821154229.2417453-1-peter.mayd...@linaro.org
Commit: 58112aa8bf6f548c104bb6c344e8738ec3ed8cbd
https://github.com/qemu/qemu/commit/58112aa8bf6f548c104bb6c344e8738ec3ed8cbd
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2025-08-28 (Thu, 28 Aug 2025)
Changed paths:
M .editorconfig
M MAINTAINERS
M accel/tcg/atomic_common.c.inc
M accel/tcg/atomic_template.h
M accel/tcg/tcg-runtime.h
M docs/conf.py
M docs/sphinx/kerneldoc.py
M docs/system/arm/emulation.rst
R host/include/aarch64/host/atomic128-cas.h
A host/include/aarch64/host/atomic128-cas.h.inc
M host/include/generic/host/atomic128-cas.h.inc
M hw/arm/boot.c
M hw/arm/stm32f205_soc.c
M hw/arm/virt.c
M hw/intc/arm_gicv3_kvm.c
M include/accel/tcg/cpu-ldst-common.h
M include/hw/arm/stm32f205_soc.h
M include/hw/intc/arm_gicv3_common.h
M include/tcg/tcg-op-common.h
M include/tcg/tcg-op.h
M linux-user/aarch64/elfload.c
R scripts/kernel-doc
A scripts/kernel-doc.py
A scripts/lib/kdoc/kdoc_files.py
A scripts/lib/kdoc/kdoc_item.py
A scripts/lib/kdoc/kdoc_output.py
A scripts/lib/kdoc/kdoc_parser.py
A scripts/lib/kdoc/kdoc_re.py
M target/arm/cpregs-pmu.c
M target/arm/cpu-features.h
M target/arm/cpu.c
M target/arm/cpu.h
M target/arm/helper.c
M target/arm/internals.h
M target/arm/ptw.c
M target/arm/tcg/a64.decode
M target/arm/tcg/cpu64.c
M target/arm/tcg/translate-a64.c
M tcg/tcg-op-ldst.c
M tests/functional/aarch64/test_device_passthrough.py
M tests/functional/aarch64/test_rme_sbsaref.py
M tests/functional/aarch64/test_rme_virt.py
M tests/qtest/libqtest.h
Log Message:
-----------
Merge tag 'pull-target-arm-20250828' of https://gitlab.com/pm215/qemu into
staging
target-arm queue:
* Implement FEAT_SCTLR2
* Implement FEAT_TCR2
* Implement FEAT_CSSC
* Implement FEAT_LSE128
* Clean up of register field definitions
* Trap PMCR when MDCR_EL2.TPMCR is set
* tests/functional: update aarch64 RME test images
* hw/intc/arm_gicv3_kvm: preserve pending interrupts during cpr
* hw/arm: add static NVDIMMs in device tree
* hw/arm/stm32f205_soc: Don't leak TYPE_OR_IRQ objects
* scripts/kernel-doc: Avoid new Perl precedence warning
* scripts/kernel-doc: Update to kernel's new Python implementation
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# gpg: Signature made Thu 28 Aug 2025 09:33:13 PM AEST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.mayd...@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.mayd...@linaro.org>" [unknown]
# gpg: aka "Peter Maydell <pmayd...@gmail.com>" [unknown]
# gpg: aka "Peter Maydell <pmayd...@chiark.greenend.org.uk>"
[unknown]
# gpg: aka "Peter Maydell <pe...@archaic.org.uk>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20250828' of https://gitlab.com/pm215/qemu: (32 commits)
hw/arm/stm32f205_soc: Don't leak TYPE_OR_IRQ objects
target/arm: Enable FEAT_LSE128 for -cpu max
target/arm: Implement FEAT_LSE128
target/arm: Rename isar_feature_aa64_atomics
tcg: Add tcg_gen_atomic_{xchg,fetch_and,fetch_or}_i128
accel/tcg: Add cpu_atomic_*_mmu for 16-byte xchg, fetch_and, fetch_or
qemu/atomic: Add atomic16 primitives for xchg, fetch_and, fetch_or
qemu/atomic: Finish renaming atomic128-cas.h headers
target/arm: Correct condition of aa64_atomics feature function
MAINTAINERS: Put kernel-doc under the "docs build machinery" section
scripts/kernel-doc: Delete the old Perl kernel-doc script
scripts/kerneldoc: Switch to the Python kernel-doc script
scripts/kernel-doc: tweak for QEMU coding standards
scripts/kernel-doc: strip QEMU_ from function definitions
scripts: Import Python kerneldoc from Linux kernel
tests/qtest/libqtest.h: Remove stray space from doc comment
docs/sphinx/kerneldoc.py: Handle new LINENO syntax
scripts/kernel-doc: Avoid new Perl precedence warning
hw/arm: add static NVDIMMs in device tree
target/arm: Enable FEAT_CSSC for -cpu max
...
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Compare: https://github.com/qemu/qemu/compare/ca18b336e12c...58112aa8bf6f
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