Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: de3c9f552d8d6af5e1a5f28eb93c836080715796
      
https://github.com/qemu/qemu/commit/de3c9f552d8d6af5e1a5f28eb93c836080715796
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M hw/loongarch/virt.c
    M target/loongarch/cpu.h
    M target/loongarch/kvm/kvm_loongarch.h

  Log Message:
  -----------
  target/loongarch: Move some function definition to kvm directory

Move function definition specified with kvm to the corresponding
directory. Also remove header file "cpu.h" including outside of
macro QEMU_KVM_LOONGARCH_H.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: 982d7674ff4ed1affc4dadba2c6f6ab1b1df4e97
      
https://github.com/qemu/qemu/commit/982d7674ff4ed1affc4dadba2c6f6ab1b1df4e97
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M target/loongarch/cpu.c
    M target/loongarch/cpu.h

  Log Message:
  -----------
  target/loongarch: Define function loongarch_cpu_post_init as static

Function loongarch_cpu_post_init() is implemented and used in the
same file target/loongarch/cpu.c, it can be defined as static function.

This patch moves implementation about function loongarch_cpu_post_init()
before it is referenced. And it is only code movement, no function
change.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: 198c827ca5d3bee6aa0c498f25f5ea6928f57de2
      
https://github.com/qemu/qemu/commit/198c827ca5d3bee6aa0c498f25f5ea6928f57de2
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M target/loongarch/tcg/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Set page size in TLB entry with STLB

With VTLB different TLB entry may have different page size, and
page size is set in PS field of TLB entry. However with STLB, all
the TLB entries have the same page size, page size comes from register
CSR_STLBPS, PS field of TLB entry is not used.

Here PS field of TLB entry is used with all TLB entries, even with
STLB. It is convenient with TLB maintainance operation.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Song Gao <gaos...@loongson.cn>


  Commit: a3d4bc4845911d82162f5be782f73e9742a41306
      
https://github.com/qemu/qemu/commit/a3d4bc4845911d82162f5be782f73e9742a41306
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    A target/loongarch/cpu-mmu.h
    M target/loongarch/cpu.c
    M target/loongarch/cpu_helper.c
    M target/loongarch/internals.h
    M target/loongarch/tcg/csr_helper.c
    M target/loongarch/tcg/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Add header file cpu-mmu.h

New header file cpu-mmu.h is added and move mmu relative function
declaration to this file.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: 912f75eaed5f686fe0f312e8ac797be7c1f43b0e
      
https://github.com/qemu/qemu/commit/912f75eaed5f686fe0f312e8ac797be7c1f43b0e
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M target/loongarch/cpu-mmu.h
    M target/loongarch/cpu_helper.c
    M target/loongarch/tcg/tcg_loongarch.h
    M target/loongarch/tcg/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Add enum type TLBRet definition

There is mixed usage between enum variable TLBRET_xxx and int type,
here add enum type TLBRet definition and replace int type variable
with enum type TLBRet in some functions.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: 82cd0be29b603ef620f45053a406bdb4a3221563
      
https://github.com/qemu/qemu/commit/82cd0be29b603ef620f45053a406bdb4a3221563
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M target/loongarch/cpu-mmu.h
    M target/loongarch/cpu_helper.c
    M target/loongarch/tcg/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Use vaddr in get_physical_address()

Replace target_ulong type with vaddr in function get_physical_address()
and the same with its calling functions.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: e6c855f44ad63b5e94bc3d27adca12c24ce7953d
      
https://github.com/qemu/qemu/commit/e6c855f44ad63b5e94bc3d27adca12c24ce7953d
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M target/loongarch/tcg/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Use MMUAccessType in loongarch_map_tlb_entry()

Enum type MMUAccessType is used in function loongarch_map_tlb_entry()
rather than int type, and keep consistent with its caller function.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: 7392cb1c7b24e34987b6f2bbff00c39fe0829cc9
      
https://github.com/qemu/qemu/commit/7392cb1c7b24e34987b6f2bbff00c39fe0829cc9
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M target/loongarch/cpu-mmu.h
    M target/loongarch/cpu_helper.c
    M target/loongarch/tcg/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Add common function loongarch_check_pte()

Common function loongarch_check_pte() is to check tlb entry, return
the physical address and access priviledge if found. Also it can be
used with page table entry, which is used in page table walker.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: 3dd4a2d0fc339c3cb321d69a0372cb9433786105
      
https://github.com/qemu/qemu/commit/3dd4a2d0fc339c3cb321d69a0372cb9433786105
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M target/loongarch/cpu_helper.c

  Log Message:
  -----------
  target/loongarch: Use loongarch_check_pte in loongarch_page_table_walker

Function loongarch_check_pte() can get physical address and access
priviledge, it works on both TLB entry and pte entry. It can be used
in function loongarch_page_table_walker() also.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: 36055cf414b591ce2467631dbd5d8c32d4350263
      
https://github.com/qemu/qemu/commit/36055cf414b591ce2467631dbd5d8c32d4350263
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M target/loongarch/tcg/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Use MMUConext in loongarch_map_tlb_entry()

With function loongarch_map_tlb_entry(), parameter MMUConext is added
and remove parameter physical, prot and address.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: 35fc0ec73c3264b67ba2c8d5e39d5897dca2c891
      
https://github.com/qemu/qemu/commit/35fc0ec73c3264b67ba2c8d5e39d5897dca2c891
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M target/loongarch/cpu_helper.c
    M target/loongarch/tcg/tcg_loongarch.h
    M target/loongarch/tcg/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Use MMUContext in loongarch_get_addr_from_tlb

With function loongarch_get_addr_from_tlb(), parameter MMUContext
is added and remove parameter physical, prot and address.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: 4817a22edd49fc671f6efdc922826a4ce7f91017
      
https://github.com/qemu/qemu/commit/4817a22edd49fc671f6efdc922826a4ce7f91017
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M target/loongarch/cpu_helper.c

  Log Message:
  -----------
  target/loongarch: Use MMUContext in loongarch_map_address()

With function loongarch_map_address(), parameter MMUContext is added
and remove parameter address, prot and address.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: f95b9702750507665f90e377b5c6c68274104024
      
https://github.com/qemu/qemu/commit/f95b9702750507665f90e377b5c6c68274104024
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M target/loongarch/cpu-mmu.h
    M target/loongarch/cpu_helper.c
    M target/loongarch/tcg/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Use MMUContext in get_physical_address()

With function get_physical_address(), parameter MMUContext is added
and remove parameter address, prot and address.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: cc78259deb21940521a227619eb00a4b8e3e36c2
      
https://github.com/qemu/qemu/commit/cc78259deb21940521a227619eb00a4b8e3e36c2
  Author: Bibo Mao <maob...@loongson.cn>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M target/loongarch/tcg/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Use correct address when flush tlb

With tlb_flush_range_by_mmuidx(), the virtual address is 64 bit.
However on LoongArch TLB emulation system, virtual address is
48 bit. It is necessary to signed-extend 48 bit address to 64 bit when
flush tlb, also fix address calculation issue with odd page.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


  Commit: 09d16ef11c97684a658c29ef1c75bce9f6019328
      
https://github.com/qemu/qemu/commit/09d16ef11c97684a658c29ef1c75bce9f6019328
  Author: Richard Henderson <richard.hender...@linaro.org>
  Date:   2025-09-01 (Mon, 01 Sep 2025)

  Changed paths:
    M hw/loongarch/virt.c
    A target/loongarch/cpu-mmu.h
    M target/loongarch/cpu.c
    M target/loongarch/cpu.h
    M target/loongarch/cpu_helper.c
    M target/loongarch/internals.h
    M target/loongarch/kvm/kvm_loongarch.h
    M target/loongarch/tcg/csr_helper.c
    M target/loongarch/tcg/tcg_loongarch.h
    M target/loongarch/tcg/tlb_helper.c

  Log Message:
  -----------
  Merge tag 'pull-loongarch-20250829' of https://github.com/bibo-mao/qemu into 
staging

loongarch queue

# -----BEGIN PGP SIGNATURE-----
#
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# 0ZbOAQD5zRl292WYzl6qCWe+MIx+7T3rqiq8E/MkAUPhPSF2gAD8DYCQr1u+7le6
# pwzGx5iHygCzeTjgV4KuciGGqa8y8AA=
# =OX6j
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 29 Aug 2025 12:05:16 PM AEST
# gpg:                using EDDSA key 0D8642A3A2659F80B0B3D1A41F7B0C1251ACE7D1
# gpg: Good signature from "bibo mao <maob...@loongson.cn>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7044 3A00 19C0 E97A 31C7  13C4 8E86 8FB7 A176 9D4C
#      Subkey fingerprint: 0D86 42A3 A265 9F80 B0B3  D1A4 1F7B 0C12 51AC E7D1

* tag 'pull-loongarch-20250829' of https://github.com/bibo-mao/qemu:
  target/loongarch: Use correct address when flush tlb
  target/loongarch: Use MMUContext in get_physical_address()
  target/loongarch: Use MMUContext in loongarch_map_address()
  target/loongarch: Use MMUContext in loongarch_get_addr_from_tlb
  target/loongarch: Use MMUConext in loongarch_map_tlb_entry()
  target/loongarch: Use loongarch_check_pte in loongarch_page_table_walker
  target/loongarch: Add common function loongarch_check_pte()
  target/loongarch: Use MMUAccessType in loongarch_map_tlb_entry()
  target/loongarch: Use vaddr in get_physical_address()
  target/loongarch: Add enum type TLBRet definition
  target/loongarch: Add header file cpu-mmu.h
  target/loongarch: Set page size in TLB entry with STLB
  target/loongarch: Define function loongarch_cpu_post_init as static
  target/loongarch: Move some function definition to kvm directory

Signed-off-by: Richard Henderson <richard.hender...@linaro.org>


Compare: https://github.com/qemu/qemu/compare/91589bcd9fee...09d16ef11c97

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