Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: b2e0f64776c59690d74b8368320d9d8a440f364c
https://github.com/qemu/qemu/commit/b2e0f64776c59690d74b8368320d9d8a440f364c
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
Log Message:
-----------
hw/i386/pc: Remove deprecated pc-q35-3.0 and pc-i440fx-3.0 machines
These machines has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit
ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") they can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: cc60846298a00acefe4110f0b2d083912466f2e3
https://github.com/qemu/qemu/commit/cc60846298a00acefe4110f0b2d083912466f2e3
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/i386/pc.c
M include/hw/i386/pc.h
Log Message:
-----------
hw/i386/pc: Remove pc_compat_3_0[] array
The pc_compat_3_0[] array was only used by the pc-q35-3.0
and pc-i440fx-3.0 machines, which got removed. Remove it.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: 804cca26dc9be59c6e020641b865012b96faf021
https://github.com/qemu/qemu/commit/804cca26dc9be59c6e020641b865012b96faf021
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M target/i386/cpu.c
M target/i386/cpu.h
M target/i386/kvm/kvm.c
Log Message:
-----------
target/i386/kvm: Remove X86CPU::hyperv_synic_kvm_only field
The X86CPU::hyperv_synic_kvm_only boolean (see commit 9b4cf107b09
"hyperv: only add SynIC in compatible configurations") was only set
in the pc_compat_3_0[] array, via the 'x-hv-synic-kvm-only=on'
property. We removed all machines using that array, lets remove that
property and all the code around it.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: 0a44e965e84a691c84fa5430979812df27e74d52
https://github.com/qemu/qemu/commit/0a44e965e84a691c84fa5430979812df27e74d52
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/core/machine.c
M include/hw/core/boards.h
Log Message:
-----------
hw/core/machine: Remove the hw_compat_3_0[] array
The hw_compat_3_0[] array was only used by the pc-q35-3.0
and pc-i440fx-3.0 machines, which got removed. Remove it.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: 5b7814c0fcfce2bc795880f0ed0fb98e3e492281
https://github.com/qemu/qemu/commit/5b7814c0fcfce2bc795880f0ed0fb98e3e492281
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M meson.build
Log Message:
-----------
meson: Include various directories providing stubs before libqemuutil
Stubs are provided by libqemuutil. We want to use the generic meson
machinery to provide stubs once, instead of per sub-directories. Move
the 'subdir' calls earlier so when these directories are processed
they can add units to the global stub_ss[] source set.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 75e92ebbdf6452f21fc2fd14edaffaadf1857635
https://github.com/qemu/qemu/commit/75e92ebbdf6452f21fc2fd14edaffaadf1857635
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/acpi/acpi_interface.c
M hw/acpi/core.c
M include/hw/acpi/acpi.h
M include/hw/acpi/acpi_dev_interface.h
Log Message:
-----------
hw/acpi: Move acpi_send_event() function out of acpi_interface.c
acpi_interface.c should only register QOM interfaces. Move
the acpi_send_event() function to core.c with the other
event handlers, and its declaration in 'hw/acpi/acpi.h'.
Reviewed-by: Pierrick Bouvier <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Message-Id: <[email protected]>
Commit: b5d09c11d1e0b5decd4643325abb63f0c1be7ad9
https://github.com/qemu/qemu/commit/b5d09c11d1e0b5decd4643325abb63f0c1be7ad9
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/acpi/acpi_interface.c
M hw/acpi/aml-build.c
Log Message:
-----------
hw/acpi: Move qbus_build_aml() function out of acpi_interface.c
acpi_interface.c should only register QOM interfaces. Move
the qbus_build_aml() function to aml-build.c with the other
AML build-related helpers.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Message-Id: <[email protected]>
Commit: 1c99c7d91e3f6998b12603da9a14064b60b63e80
https://github.com/qemu/qemu/commit/1c99c7d91e3f6998b12603da9a14064b60b63e80
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/acpi/meson.build
Log Message:
-----------
hw/acpi: Always link QOM interfaces with system binaries
Now that acpi_interface.c only contains QOM interfaces,
unconditionally link it with system binaries, regardless
of whether CONFIG_ACPI is set or not. It is now easier to
deselect hardware models depending on ACPI.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Message-Id: <[email protected]>
Commit: 5752af7b58dcc6ba61b5e889386e8b18c969fc93
https://github.com/qemu/qemu/commit/5752af7b58dcc6ba61b5e889386e8b18c969fc93
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/nvram/meson.build
Log Message:
-----------
hw/nvram: Build fw_cfg-acpi.c once
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Message-Id: <[email protected]>
Commit: fb1d68d1d6d4515975e97eb93e5717764b61c47e
https://github.com/qemu/qemu/commit/fb1d68d1d6d4515975e97eb93e5717764b61c47e
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/acpi/meson.build
Log Message:
-----------
hw/acpi: Build stubs once
Move stubs to the global stub_ss[] source set. These files
are now built once for all binaries, instead of one time
per system binary.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Message-Id: <[email protected]>
Commit: 8e5f6bc4e0a512af4f57c063617513f50c099867
https://github.com/qemu/qemu/commit/8e5f6bc4e0a512af4f57c063617513f50c099867
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/net/meson.build
R hw/net/rocker/qmp-norocker.c
A hw/net/rocker/rocker-stubs.c
Log Message:
-----------
hw/net: Build stubs once
Move stubs to the global stub_ss[] source set. These files
are now built once for all binaries, instead of one time
per system binary.
qmp-norocker.c only contains stubs, rename it accordingly.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 2fa22ab7fe5a1ca4e0c2daecbe0a676e44d55aa8
https://github.com/qemu/qemu/commit/2fa22ab7fe5a1ca4e0c2daecbe0a676e44d55aa8
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/cxl/meson.build
M hw/i386/kvm/meson.build
M hw/mem/meson.build
M hw/pci/meson.build
M hw/smbios/meson.build
M hw/usb/meson.build
M hw/virtio/meson.build
Log Message:
-----------
hw/*: Build stubs once
Move stubs to the global stub_ss[] source set. These files
are now built once for all binaries, instead of one time
per system binary.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 8adc13d0c56f6113d88be2170e2fc7021086367c
https://github.com/qemu/qemu/commit/8adc13d0c56f6113d88be2170e2fc7021086367c
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M semihosting/meson.build
Log Message:
-----------
semihosting: Build stubs once
Move stubs to the global stub_ss[] source set. These files
are now built once for all binaries, instead of one time
per system binary.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 566ca148901bcd020e01e281eaad62e87ab68cca
https://github.com/qemu/qemu/commit/566ca148901bcd020e01e281eaad62e87ab68cca
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/s390x/meson.build
A hw/s390x/s390-pci-vfio-stubs.c
M include/hw/s390x/s390-pci-vfio.h
Log Message:
-----------
hw/s390x/s390-pci-vfio: Avoid including CONFIG_DEVICES in hw/ header
By turning the inline functions into stubs we can avoid the
use of target-specific CONFIG_DEVICES include in a hw/ header,
allowing to build the source files including it as common objects.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Farhan Ali<[email protected]>
Message-Id: <[email protected]>
Commit: 250d97681a00501edb9a7a24e20642f7a063b72d
https://github.com/qemu/qemu/commit/250d97681a00501edb9a7a24e20642f7a063b72d
Author: David Hamilton <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/misc/ivshmem-pci.c
Log Message:
-----------
hw/misc/ivshmem-pci: Handle error from kvm_irqchip_add_irqfd_notifier_gsi()
The return value of kvm_irqchip_add_irqfd_notifier_gsi() was being
ignored. Propagate the error to the caller via errp.
Also change setup_interrupt() to return bool to follow QEMU error
handling conventions, making error checks at call sites simpler.
Resolves the TODO comment at the call site.
Signed-off-by: David Hamilton <[email protected]>
Reviewed-by: Markus Armbruster <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: b1feb17eaac8adaa5038039e38a7dc97d009efc2
https://github.com/qemu/qemu/commit/b1feb17eaac8adaa5038039e38a7dc97d009efc2
Author: Daniel P. Berrangé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/i386/pc.c
Log Message:
-----------
hw/i386: drop unused PC_CPU_MODEL_IDS macro
This is redundant since the 2.4 machine types were dropped.
Fixes: 4c82e7b34b1bf35d97e026196f5bf10ea916512c
Signed-off-by: Daniel P. Berrangé <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 601eb8f8acac3475ff3b9a4d2ba9bac3a088e99b
https://github.com/qemu/qemu/commit/601eb8f8acac3475ff3b9a4d2ba9bac3a088e99b
Author: Chad Jablonski <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/display/ati.c
M hw/display/ati_int.h
Log Message:
-----------
ati-vga: Fix framebuffer mapping by using hardware-correct aperture sizes
Rage 128 cards always request 64MB for their linear (framebuffer)
aperture and R100 cards always request 128MB. This is regardless
of the amount of physical VRAM on the board. The following are results
from real hardware tests:
Card VRAM PCI BAR0 CONFIG_MEMSIZE
CONFIG_APER_SIZE AGP_APER_OFFSET
----------------------- ---- -------- --------------
---------------- ---------------
Rage 128 Pro Ultra TF 32MB 64MB 0x02000000
0x02000000 0x02000000
Rage 128 RF/SG AGP 16MB 64MB 0x01000000
0x02000000 0x02000000
Radeon R100 QD [Radeon 7200] 64MB 128MB 0x04000000
0x04000000 N/A
Radeon RV100 QY [Radeon 7000/VE] 32MB 128MB 0x02000000
0x04000000 N/A
Previously the linear aperture (BAR0) would match the VRAM size.
This discrepancy caused issues with the X.org and XFree86 r128 drivers.
These drivers apply a mask of 0xfc000000 (2^26 = 64MB) to the linear
aperture address. If that address is not on a 64MB boundary the
framebuffer points to an incorrect memory location.
Testing shows that the Radeon R100 also has a BAR0 larger than VRAM
(128MB in this case) and the X.org radeon driver also masks to 64MB.
For Rage 128, CONFIG_APER_SIZE also differs from the previous value and
the behavior stated in the documentation. The Rage 128 register guide
states that it should contain the size of the VRAM + AGP memory. The cards
tested above show that this isn't the case. These tests also included
enabling/disabling AGP with 8MB of memory. It didn't change the
contents of CONFIG_APER_SIZE.
For both Rage 128 and R100 the CONFIG_APER_SIZE is half of the PCI BAR0 size.
Signed-off-by: Chad Jablonski <[email protected]>
Reviewed-by: BALATON Zoltan <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 12ea77b4c25b8d2c0835cccd6c1719381a1f25ef
https://github.com/qemu/qemu/commit/12ea77b4c25b8d2c0835cccd6c1719381a1f25ef
Author: Chad Jablonski <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/display/ati.c
Log Message:
-----------
ati-vga: Fix DST_PITCH and SRC_PITCH reads
Reading DST_PITCH and SRC_PITCH on the Rage 128 is broken. The read
handlers attempt to construct the value from pitch and tile bits in
the register state but mistakenly AND them instead of ORing them. This
means the pitch is always zero on read.
Signed-off-by: Chad Jablonski <[email protected]>
Reviewed-by: BALATON Zoltan <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 5c531f80f6ba3fc905ed9c9bc0b7158a9f715589
https://github.com/qemu/qemu/commit/5c531f80f6ba3fc905ed9c9bc0b7158a9f715589
Author: Chad Jablonski <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/display/ati.c
M hw/display/ati_regs.h
Log Message:
-----------
ati-vga: Read aliased values from DP_GUI_MASTER_CNTL
DP_GUI_MASTER_CNTL aliases several fields from DP_DATATYPE and DP_MIX.
These were being written correctly but not returned on a read of
DP_GUI_MASTER_CNTL.
Signed-off-by: Chad Jablonski <[email protected]>
Reviewed-by: BALATON Zoltan <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 3ab35ff519b95cb37e1f87281229ea68229daf58
https://github.com/qemu/qemu/commit/3ab35ff519b95cb37e1f87281229ea68229daf58
Author: Chad Jablonski <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/display/ati.c
M hw/display/ati_2d.c
Log Message:
-----------
ati-vga: Latch src and dst pitch and offset on master_cntl default
Hardware testing on the Rage 128 confirms that (SRC/DST)_OFFSET,
and (SRC/DST)_PITCH are latched when (SRC/DST)_PITCH_OFFSET_CNTL bits
in DP_GUI_MASTER_CNTL are set to "default".
The earlier approach looked at the state of the (SRC/DST)_PITCH_OFFSET_CNTL
bits when offset and pitch registers were used. This meant that when
(SRC/DST)_PITCH_OFFSET_CNTL was reset to "leave alone" the old values
stored in the registers would return. This is not how the real hardware
works.
Signed-off-by: Chad Jablonski <[email protected]>
Reviewed-by: BALATON Zoltan <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 18e2382172e1cc8f046b120ede954e2e6c1b525f
https://github.com/qemu/qemu/commit/18e2382172e1cc8f046b120ede954e2e6c1b525f
Author: Chad Jablonski <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/display/ati.c
Log Message:
-----------
ati-vga: Implement foreground and background color register writes
These are straightforward 32-bit register write handlers. They're
necessary for a future patch which will use them for color expansion
from monochrome host data transfers.
Signed-off-by: Chad Jablonski <[email protected]>
Reviewed-by: BALATON Zoltan <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 1b079e183d4c1da8741e4cc313b939ea1f62439a
https://github.com/qemu/qemu/commit/1b079e183d4c1da8741e4cc313b939ea1f62439a
Author: Chad Jablonski <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/display/ati.c
M hw/display/ati_int.h
M hw/display/ati_regs.h
Log Message:
-----------
ati-vga: Add scissor clipping register support
Implement read and write operations on SC_TOP_LEFT, SC_BOTTOM_RIGHT,
and SRC_SC_BOTTOM_RIGHT registers. These registers are also updated
when the src and/or dst clipping fields on DP_GUI_MASTER_CNTL are set
to default clipping.
Scissor clipping is used when rendering text in X.org. The r128 driver
sends host data much wider than is necessary to draw a glyph and cuts it
down to size using clipping before rendering. The actual clipping
implementation follows in a future patch.
This also includes a very minor refactor of the combined
default_sc_bottom_right field in the registers struct to
default_sc_bottom and default_sc_right. This was done to
stay consistent with the other scissor registers and prevent repeated
masking and extraction.
Signed-off-by: Chad Jablonski <[email protected]>
Reviewed-by: BALATON Zoltan <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 4df53270ae57f880758099d621be96c252fa5e83
https://github.com/qemu/qemu/commit/4df53270ae57f880758099d621be96c252fa5e83
Author: Chad Jablonski <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/display/ati_2d.c
Log Message:
-----------
ati-vga: Remove dst_x/y updates after blit
The Mobility M6 register reference (DST_HEIGHT_WIDTH) states that dst_y is
updated after a blit but this appears to not be the case.
Hardware testing revealed that both the R128 and R100 do not update
dst_x or dst_y after a blit, regardless of the source. This removes
the update.
Signed-off-by: Chad Jablonski <[email protected]>
Reviewed-by: BALATON Zoltan <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 1246965b3e799311d59cb52fca0cbe46265275a9
https://github.com/qemu/qemu/commit/1246965b3e799311d59cb52fca0cbe46265275a9
Author: Chad Jablonski <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/display/ati_2d.c
Log Message:
-----------
ati-vga: Consolidate dirty region tracking in ati_2d_blt
Both supported ROPs follow the same memory set dirty logic.
This consolidates that logic to remove the duplication.
Signed-off-by: Chad Jablonski <[email protected]>
Reviewed-by: BALATON Zoltan <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 6595a8d5d17ea1716ddafb34455ec2b29381e232
https://github.com/qemu/qemu/commit/6595a8d5d17ea1716ddafb34455ec2b29381e232
Author: Peter Maydell <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/net/trace-events
M hw/net/xilinx_ethlite.c
Log Message:
-----------
hw/net/xilinx_ethlite: Check for oversized TX packets
The xilinx_ethlite network device wasn't checking that the TX packet
size set by the guest was within the size of its dual port RAM, with
the effect that the guest could get it to read off the end of the RAM
block.
Check the length. There is no provision in this very simple device
for reporting errors, so as with various RX errors we just report via
tracepoint.
This lack of length check has been present since the device was first
introduced, though the code implementing the tx path has changed
somewhat since then.
Cc: [email protected]
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3317
Fixes: b43848a1005ce ("xilinx: Add ethlite emulation")
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Edgar E. Iglesias <[email protected]>
Message-ID: <[email protected]>
[PMD: renamed size -> tx_size to avoid shadow=compatible-local error]
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 0be66f6e7773712f0e3a6ad339afc8af6fa621e0
https://github.com/qemu/qemu/commit/0be66f6e7773712f0e3a6ad339afc8af6fa621e0
Author: Thomas Huth <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Replace @tuxfamily.org address
Tuxfamily.org has had many outages in the recent years and will likely
go away in the near future:
https://forum.tuxfamily.org/post/3381/#p3381
Thus replace my @tuxfamily.org address with another one that is more
reliable and hopefully will survive longer.
Signed-off-by: Thomas Huth <[email protected]>
Reviewed-by: Gustavo Romero <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: a3b23b946c85062ff6fbdcc3d1f10557715516e4
https://github.com/qemu/qemu/commit/a3b23b946c85062ff6fbdcc3d1f10557715516e4
Author: Akihiko Odaki <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M ui/cocoa.m
Log Message:
-----------
ui/cocoa: Do not automatically zoom for HiDPI
Cocoa automatically zooms for a HiDPI display like Retina and makes
the display blurry. Revert the automatic zooming.
Signed-off-by: Akihiko Odaki <[email protected]>
Acked-by: Marc-André Lureau <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: b28c3ad1d63c2fe167b6f93fad1616ecd769e599
https://github.com/qemu/qemu/commit/b28c3ad1d63c2fe167b6f93fad1616ecd769e599
Author: Gerd Hoffmann <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/uefi/var-service-vars.c
Log Message:
-----------
hw/uefi: add variable digest to vmstate
Add digest to vmstate if needed. Clear digest before
loading vmstate to make sure it is initialized.
Fixes: db1ecfb473ac ("hw/uefi: add var-service-vars.c")
Signed-off-by: Gerd Hoffmann <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 9e0de45d41e0c9c0cf5ad94f8429cf104713d940
https://github.com/qemu/qemu/commit/9e0de45d41e0c9c0cf5ad94f8429cf104713d940
Author: Jim MacArthur <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/net/xilinx_axienet.c
Log Message:
-----------
hw/net/xilinx_axienet: Prevent writes to PHY Identification registers
There are other registers in the PHY model which should be partially or
entirely read-only, but this solves the immediate issue.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3297
Signed-off-by: Jim MacArthur <[email protected]>
Reviewed-by: Edgar E. Iglesias <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 85c0c6729da6ecce5e74fd4c7615509ace2d60fc
https://github.com/qemu/qemu/commit/85c0c6729da6ecce5e74fd4c7615509ace2d60fc
Author: Thomas Huth <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Update the maintainer for the CHRP NVRAM section
I am not involved in the ppc machines anymore (the pseries machine was
the reason why I took over maintainership of the CHRP NVRAM code in the
past), so it does not make much sense that I'm still listed here as the
maintainer.
The CHRP NVRAM code is used by the mac99 / g3beige ppc machines and
some Sparc machines, too, where Mark is the maintainer, so I asked him
whether he would be interested in being listed as the maintainer here,
and fortunately, he agreed! Thanks, Mark!
Signed-off-by: Thomas Huth <[email protected]>
Acked-by: Mark Cave-Ayland <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: ff0f5cefeb4b7cb450886ba3d380698076ef3467
https://github.com/qemu/qemu/commit/ff0f5cefeb4b7cb450886ba3d380698076ef3467
Author: Bernhard Beschow <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/arm/Kconfig
Log Message:
-----------
hw/arm/Kconfig: Fix serial selection for NPCM8XX
CONFIG_SERIAL selects the internal TYPE_SERIAL device which is akin to
an "IP block" that needs to be integrated with glue logic. In case of
NPCM8XX this glue logic is TYPE_SERIAL_MM which the code uses already.
Fix Kconfig to select CONFIG_SERIAL_MM which matches TYPE_SERIAL_MM.
Fixes: ae0c4d1a1290 ("hw/arm: Add NPCM8XX SoC")
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 7e68ad18f5642e87a5970b0f45fc0d8c0ed22fd9
https://github.com/qemu/qemu/commit/7e68ad18f5642e87a5970b0f45fc0d8c0ed22fd9
Author: Bernhard Beschow <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/char/diva-gsp.c
M hw/char/serial-pci-multi.c
Log Message:
-----------
hw/char/{diva-gsp, serial-pci-multi}: Fix deinitialization order
The memory region is owned by the device being unrealized, so must be
removed from the mapping before unrealizing.
Fixes: d66bbea4e0d3 ("serial: add 2x + 4x pci variant")
Fixes: 274074708455 ("hw/char: Add emulation of Diva GSP PCI management boards")
Reported-by: Peter Maydell <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 79c0b572516818bdfb08dfce2bb769d10d1aa816
https://github.com/qemu/qemu/commit/79c0b572516818bdfb08dfce2bb769d10d1aa816
Author: Bernhard Beschow <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/arm/aspeed_ast27x0-ssp.c
M hw/arm/aspeed_ast27x0-tsp.c
Log Message:
-----------
hw/arm/aspeed_ast27x0-{ssp, tsp}: Do not access SerialMM internals directly
SerialMM inherits from SysBusDevice and exposes the memory region by
means of sysbus_mmio_get_region(). Use that in order to avoid accessing
implementation details of SerialMM.
Reviewed-by: Jamin Lin <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 6cbfd6008da1bc6654ef8277590c3df2c763b1cb
https://github.com/qemu/qemu/commit/6cbfd6008da1bc6654ef8277590c3df2c763b1cb
Author: Bernhard Beschow <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M include/qemu/fifo8.h
M util/fifo8.c
Log Message:
-----------
util/fifo8: Make all read-only methods const-correct
Allows these methods to be used in const contexts, i.e. where the parent
of the fifo itself is const. This is in particular useful for Rust code.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 4b376e710e1090be6b367228d28946068ac9f37f
https://github.com/qemu/qemu/commit/4b376e710e1090be6b367228d28946068ac9f37f
Author: Bernhard Beschow <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/char/serial.c
Log Message:
-----------
hw/char/serial: Remove explicit cast from void pointer
A void pointer asks for being casted, so C allows for omitting the
explicit cast. Take advantage of that.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: cbac82dbb7217b14e25c81a5bd92dc01aa1c15c2
https://github.com/qemu/qemu/commit/cbac82dbb7217b14e25c81a5bd92dc01aa1c15c2
Author: Bernhard Beschow <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/char/serial.c
Log Message:
-----------
hw/char/serial: Prefer fifo8 methods over open-coding
Use fifo8_is_empty() and fifo8_is_full() to improve readability of the
code.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 9f8caee699c955bae5266ac33e02f12bbe7bccab
https://github.com/qemu/qemu/commit/9f8caee699c955bae5266ac33e02f12bbe7bccab
Author: Bernhard Beschow <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/char/serial.c
Log Message:
-----------
hw/char/serial: Reuse fifo8_num_used()
Avoids accessing private fields of struct Fifo8. Now, TYPE_SERIAL only
accesses struct Fifo8 through its methods.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 1a847b228b3c1c72035364010064d9ee5b8fc759
https://github.com/qemu/qemu/commit/1a847b228b3c1c72035364010064d9ee5b8fc759
Author: Bernhard Beschow <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/char/serial.c
Log Message:
-----------
hw/char/serial: Remove unhelpful comment
There is no "is_load" flag and one can tell from the method name what
the method does. Remove this unhelpful comment.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 336af956e8fd56b4db9e8f431ca3e1b13f846f0a
https://github.com/qemu/qemu/commit/336af956e8fd56b4db9e8f431ca3e1b13f846f0a
Author: Bernhard Beschow <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/char/serial.c
Log Message:
-----------
hw/char/serial: Add constants for Line Control Register
Substitute some magic numbers by named constants for slightly improved
readability.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: a8a77671b5e7f919bc8c7478d51f7b6067b50feb
https://github.com/qemu/qemu/commit/a8a77671b5e7f919bc8c7478d51f7b6067b50feb
Author: Bernhard Beschow <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/char/serial.c
Log Message:
-----------
hw/char/serial: Remove redundant reset
There is no need to invoke the reset method in realize since the reset
framework will do so anyway before the machine starts.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 12ef587e2a417c80ee8fda6e8a8ba513f0537671
https://github.com/qemu/qemu/commit/12ef587e2a417c80ee8fda6e8a8ba513f0537671
Author: Bernhard Beschow <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/char/trace-events
Log Message:
-----------
hw/char/serial: Avoid implicit conversion when tracing
On 64 bit targets, the MemoryRegion API passes an address and a value as
uint64_t, so use that for tracing. Keep the uint8_t for reading since
this is what the device model produces. On targets with less than 64
bits, uint64_t is wide enough to avoid narrowing.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: dd6bee2707c9f34271ec666d52e0086c77a6d813
https://github.com/qemu/qemu/commit/dd6bee2707c9f34271ec666d52e0086c77a6d813
Author: Anton Johansson <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/hppa/machine.c
M linux-user/hppa/elfload.c
M target/hppa/cpu-qom.h
M target/hppa/cpu.c
M target/hppa/cpu.h
M tests/qtest/machine-none-test.c
Log Message:
-----------
hppa: Introduce HPPACPUDef
Restructures the CPU class heirarchy to clarify model names and allow
for per-model configuration options via HPPACPUDef. 32-bit HPPA is
assumed to run a PA-7300LC, and 64-bit assumed to run a PA-8700.
A new PA-8500 model is added, which will later be used by the A400
machine. All CPU models are made into children of the now abstract
TYPE_HPPA_CPU base class.
Two fields are added to HPPACPUDef describing the size of the physical
address space, and whether or not the CPU uses the PA-RISC 2.0
architecture. The latter was previously a field in CPUHPPAState.
phys_addr_bits is currently set but unused, and will be used in the
following commit. Likewise, PA-8700 is moved to use 44 bit physical
addresses in a followup commit to not break bisection.
References to "hppa/hppa64" models in test cases are also updated.
Reviewed-by: Helge Deller <[email protected]>
Signed-off-by: Anton Johansson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 1a80a03a40d106ea37f5ba3a4bb4916d1ae88128
https://github.com/qemu/qemu/commit/1a80a03a40d106ea37f5ba3a4bb4916d1ae88128
Author: Anton Johansson <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/hppa/machine.c
M hw/pci-host/astro.c
M include/hw/pci-host/astro.h
M target/hppa/cpu.c
M target/hppa/cpu.h
M target/hppa/mem_helper.c
Log Message:
-----------
hppa: Get physical address space bits from HPPACPUDef
Signed-off-by: Anton Johansson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 8fefb2fd60203ee8f3bbd1f84bdfd36da7f78214
https://github.com/qemu/qemu/commit/8fefb2fd60203ee8f3bbd1f84bdfd36da7f78214
Author: Anton Johansson <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M target/hppa/cpu.c
M tests/functional/hppa/test_seabios.py
Log Message:
-----------
hppa: Use 44 bit physical addresses for PA-8700
This is in line with the PA-8700 specification which demands 44 bits.
However, this change breaks the SeaBIOS functional tests as the firmware
assumes 40 bit physical addresses. Therefore, change the functional
tests to instead run on an A400 which has the expected physical address
space size.
Reviewed-by: Helge Deller <[email protected]>
Signed-off-by: Anton Johansson <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 1dacf5b9ab0c1aecc0751deafe07b029c78e02b5
https://github.com/qemu/qemu/commit/1dacf5b9ab0c1aecc0751deafe07b029c78e02b5
Author: BALATON Zoltan <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/display/ati.c
M hw/display/ati_int.h
Log Message:
-----------
ati-vga: Allow setting EDID parameters directly
The EDID generation has some parameters that can be set via properties
but since ati-vga uses i2c-ddc it is only accessible with -global
option. Expose these properties so users can more easily set it via
e.g. -device ati-vga,xres=1024,yres=768.
Signed-off-by: BALATON Zoltan <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 7134dbcc63c670a1f5eb6b43a73b9d0f33e54981
https://github.com/qemu/qemu/commit/7134dbcc63c670a1f5eb6b43a73b9d0f33e54981
Author: Peter Maydell <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/m68k/mcf5208.c
M hw/m68k/mcf_intc.c
M include/hw/m68k/mcf.h
Log Message:
-----------
hw/m68k/mcf_intc: Use qdev input gpios for input IRQs
The m68k mcf_intc interrupt controller currently implements its
inbound IRQ lines by calling qemu_allocate_irqs() in mcf_intc_init().
This results in leaks like this:
Direct leak of 2944 byte(s) in 46 object(s) allocated from:
#0 0x5cf95ec15323 in malloc
(/home/pm215/qemu/build/san/qemu-system-m68k+0xf9e323) (BuildId:
18d55ef8ea9856e68ee30802078af5050b8b06c5)
#1 0x7637c65c5ac9 in g_malloc
(/lib/x86_64-linux-gnu/libglib-2.0.so.0+0x62ac9) (BuildId:
116e142b9b52c8a4dfd403e759e71ab8f95d8bb3)
#2 0x5cf95f6b2f27 in object_new_with_type
/home/pm215/qemu/build/san/../../qom/object.c:767:15
#3 0x5cf95f6aa62e in qemu_allocate_irq
/home/pm215/qemu/build/san/../../hw/core/irq.c:91:25
#4 0x5cf95f6aa62e in qemu_extend_irqs
/home/pm215/qemu/build/san/../../hw/core/irq.c:79:16
#5 0x5cf95f5f6d99 in mcf5208evb_init
/home/pm215/qemu/build/san/../../hw/m68k/mcf5208.c:310:11
This isn't an important leak, as it is memory we allocate once at
QEMU startup and that has to stay live for the lifetime of the
system. However it does point at a code improvement.
Modernise this to have the device itself create inbound GPIOs with
qdev_init_gpio_in() that the board can then refer to and wire up
individually.
As the device is used in only a single board, we can update device
and board in a single patch rather than having to try to figure out
some way to change the API more piecemeal.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 60405776bf514769a97ed596ee75f78ebb4f2b05
https://github.com/qemu/qemu/commit/60405776bf514769a97ed596ee75f78ebb4f2b05
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M audio/jackaudio.c
Log Message:
-----------
audio/jack: Fix use of qemu_thread_set_name() on macOS
Since commit 8f68a33ad46 we get on macOS:
Audio backends
CoreAudio support : YES
PipeWire support : NO
JACK support : YES 1.9.22
../audio/jackaudio.c:654:12: error: unused function 'qjack_thread_creator'
[-Werror,-Wunused-function]
654 | static int qjack_thread_creator(jack_native_thread_t *thread,
| ^~~~~~~~~~~~~~~~~~~~
This is simply due to a missing #ifdef'ry change. Update
so we can use the new qemu_thread_set_name() exposed by
commit 46255cc2be9.
Fixes: 8f68a33ad46 ("audio: make jackaudio use qemu_thread_set_name")
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Christian Schoenebeck <[email protected]>
Message-Id: <[email protected]>
Commit: 7624894549804de5bf9ca389fa5e933dfb93e48d
https://github.com/qemu/qemu/commit/7624894549804de5bf9ca389fa5e933dfb93e48d
Author: Helge Deller <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/hppa/machine.c
Log Message:
-----------
hw/hppa: Avoid leaking a diva-gsp device
Create a Diva-gsp unconditionally on all 64-bit PCI machines.
The A400 usually comes with a Diva card. The C3700 has a built-in
SUPERIO chip, which we haven't implemented yet, so running with an
emulated Diva is the best we can do for now.
Signed-off-by: Helge Deller <[email protected]>
Suggested-by: Peter Maydell <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 27c64fa59d1b14c4656908e1dfca49482a96df61
https://github.com/qemu/qemu/commit/27c64fa59d1b14c4656908e1dfca49482a96df61
Author: Helge Deller <[email protected]>
Date: 2026-03-08 (Sun, 08 Mar 2026)
Changed paths:
M hw/char/diva-gsp.c
Log Message:
-----------
hw/char: Drop disable property of Diva GSP card
The "disable" property is not used, so drop it.
Suggested-by: Peter Maydell <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Helge Deller <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 084a6c6e73a8670f3d5144b88d617a76fae207a8
https://github.com/qemu/qemu/commit/084a6c6e73a8670f3d5144b88d617a76fae207a8
Author: Peter Maydell <[email protected]>
Date: 2026-03-09 (Mon, 09 Mar 2026)
Changed paths:
M MAINTAINERS
M audio/jackaudio.c
M hw/acpi/acpi_interface.c
M hw/acpi/aml-build.c
M hw/acpi/core.c
M hw/acpi/meson.build
M hw/arm/Kconfig
M hw/arm/aspeed_ast27x0-ssp.c
M hw/arm/aspeed_ast27x0-tsp.c
M hw/char/diva-gsp.c
M hw/char/serial-pci-multi.c
M hw/char/serial.c
M hw/char/trace-events
M hw/core/machine.c
M hw/cxl/meson.build
M hw/display/ati.c
M hw/display/ati_2d.c
M hw/display/ati_int.h
M hw/display/ati_regs.h
M hw/hppa/machine.c
M hw/i386/kvm/meson.build
M hw/i386/pc.c
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
M hw/m68k/mcf5208.c
M hw/m68k/mcf_intc.c
M hw/mem/meson.build
M hw/misc/ivshmem-pci.c
M hw/net/meson.build
R hw/net/rocker/qmp-norocker.c
A hw/net/rocker/rocker-stubs.c
M hw/net/trace-events
M hw/net/xilinx_axienet.c
M hw/net/xilinx_ethlite.c
M hw/nvram/meson.build
M hw/pci-host/astro.c
M hw/pci/meson.build
M hw/s390x/meson.build
A hw/s390x/s390-pci-vfio-stubs.c
M hw/smbios/meson.build
M hw/uefi/var-service-vars.c
M hw/usb/meson.build
M hw/virtio/meson.build
M include/hw/acpi/acpi.h
M include/hw/acpi/acpi_dev_interface.h
M include/hw/core/boards.h
M include/hw/i386/pc.h
M include/hw/m68k/mcf.h
M include/hw/pci-host/astro.h
M include/hw/s390x/s390-pci-vfio.h
M include/qemu/fifo8.h
M linux-user/hppa/elfload.c
M meson.build
M semihosting/meson.build
M target/hppa/cpu-qom.h
M target/hppa/cpu.c
M target/hppa/cpu.h
M target/hppa/mem_helper.c
M target/i386/cpu.c
M target/i386/cpu.h
M target/i386/kvm/kvm.c
M tests/functional/hppa/test_seabios.py
M tests/qtest/machine-none-test.c
M ui/cocoa.m
M util/fifo8.c
Log Message:
-----------
Merge tag 'hw-misc-20260308' of https://github.com/philmd/qemu into staging
Misc HW patches
- Remove versioned machines released in QEMU 3.0
- Build various stubs and ACPI objects once
- Pair of bug fixes in ATI VGA model
- Cleanups in 16550A UART model
- Clarify PA-RISC CPU models (adding the PA-8500)
- Various memory leaks / overflows fixed
- MAINTAINERS updates
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* tag 'hw-misc-20260308' of https://github.com/philmd/qemu: (49 commits)
hw/char: Drop disable property of Diva GSP card
hw/hppa: Avoid leaking a diva-gsp device
audio/jack: Fix use of qemu_thread_set_name() on macOS
hw/m68k/mcf_intc: Use qdev input gpios for input IRQs
ati-vga: Allow setting EDID parameters directly
hppa: Use 44 bit physical addresses for PA-8700
hppa: Get physical address space bits from HPPACPUDef
hppa: Introduce HPPACPUDef
hw/char/serial: Avoid implicit conversion when tracing
hw/char/serial: Remove redundant reset
hw/char/serial: Add constants for Line Control Register
hw/char/serial: Remove unhelpful comment
hw/char/serial: Reuse fifo8_num_used()
hw/char/serial: Prefer fifo8 methods over open-coding
hw/char/serial: Remove explicit cast from void pointer
util/fifo8: Make all read-only methods const-correct
hw/arm/aspeed_ast27x0-{ssp, tsp}: Do not access SerialMM internals directly
hw/char/{diva-gsp, serial-pci-multi}: Fix deinitialization order
hw/arm/Kconfig: Fix serial selection for NPCM8XX
MAINTAINERS: Update the maintainer for the CHRP NVRAM section
...
Signed-off-by: Peter Maydell <[email protected]>
Compare: https://github.com/qemu/qemu/compare/1ae4271ab8db...084a6c6e73a8
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