On 26/08/2025 10:21, Xiaoyao Li wrote:
On 8/22/2025 8:11 PM, Mark Cave-Ayland wrote:
This is to prepare for splitting the isapc machine into its own
separate file.
Signed-off-by: Mark Cave-Ayland <mark.caveayl...@nutanix.com>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
---
hw/i386/pc_piix.c | 261 +++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 260 insertions(+), 1 deletion(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 071bf7412e..5b97ad2cea 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
...
+ if (piix4_pm) {
+ smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu,
0);
+
+ qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0,
smi_irq);
+ pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm),
"i2c"));
+ /* TODO: Populate SPD eeprom data. */
+ smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
+
+ object_property_add_link(OBJECT(machine),
PC_MACHINE_ACPI_DEVICE_PROP,
+ TYPE_HOTPLUG_HANDLER,
+ (Object **)&x86ms->acpi_dev,
+ object_property_allow_set_link,
+ OBJ_PROP_LINK_STRONG);
+ object_property_set_link(OBJECT(machine),
PC_MACHINE_ACPI_DEVICE_PROP,
+ piix4_pm, &error_abort);
+ }
+
+ if (machine->nvdimms_state->is_enabled) {
+ nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
+ x86_nvdimm_acpi_dsmio,
+ x86ms->fw_cfg, OBJECT(pcms));
+ }
IGVM support was merged recently and the rebase of this series doesn't
catch it.
Indeed, thanks for spotting this!
I think we need to copy the IGVM related code as well, in this patch.
We can remove it later in a separate patch if it's unnecessary for isapc.
Yes, it looks like we can just simply remove it in a separate patch
since according to the docs at
https://gitlab.com/qemu-project/qemu/-/blob/master/qemu-options.hx?ref_type=heads#L6186
IGVM is only supported for the q35 and pc machines.
}
#endif
ATB,
Mark.
