-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi, Version 0.7.2 from the Website returns invalid cache size for the i386 architecture. Currently the 'cpuid' instruction with eax==1 returns a processor ID of 0x633 that is an "Intel Pentium II (Klamath)". The Klamath is specified with 512kB of L2 Cache (see http://www.pcguide.com/ref/cpu/fam/g6PII-c.html). However the 'cpuid' instruction with eax==2 returns a descriptor value of 0x41, which indicates 128kB of L2 Cache (see http://faydoc.tripod.com/cpu/cpuid.htm). The correct value should be 0x43. To fix this, line 1317 in file target-i386/helper.c should read: EAX = 0x430601;
Thanks, Ron. PS: A hint on the website on where to post bug-reports would be helpful. PPS: Please include me into reply. I'm not subscribed to the list. - -- Mit freundlichen Gruessen / with regards ra3 @ inf.tu-dresden.de http://os.inf.tu-dresden.de/~ra3/ -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.1 (GNU/Linux) iD8DBQFDeGrtvCdOf9l7ipgRAgchAKCzPmGB0mYtcWzxVkpw4C+RL11PvwCg0COA d7wPzNZSceNZrFQdQpDbfwQ= =ar/v -----END PGP SIGNATURE----- _______________________________________________ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
