scsi.tex patch reduces unnecessary mismatch.
lsi.txt corrects mismatch condition.
When the mismatch happens, register ia saves the instruction address.
However, QEMU call lsi_bad_phase first, update new dsp and
then save it into register ia.
The patch correct this problem.
Another fix is in the table indirect addressing.
s->rbc is the same as s->dbc in direct, indirect, and table indirect mode.
I test 25 times debian installation automatically and there is no problem in
scsi.
The steps follow http://www.aurel32.net/info/debian_arm_qemu.php
will work well !!!
Index: hw/scsi-disk.c
===================================================================
RCS file: /sources/qemu/qemu/hw/scsi-disk.c,v
retrieving revision 1.13
diff -u -p -r1.13 scsi-disk.c
--- hw/scsi-disk.c 29 Aug 2006 04:52:16 -0000 1.13
+++ hw/scsi-disk.c 25 Apr 2007 04:55:11 -0000
@@ -345,7 +345,7 @@ int32_t scsi_send_command(SCSIDevice *s,
DPRINTF("Request Sense (len %d)\n", len);
if (len < 4)
goto fail;
- memset(buf, 0, 4);
+ memset(outbuf, 0, 4);
outbuf[0] = 0xf0;
outbuf[1] = 0;
outbuf[2] = s->sense;
@@ -371,7 +371,7 @@ int32_t scsi_send_command(SCSIDevice *s,
Some later commands are also implemented. */
outbuf[2] = 3;
outbuf[3] = 2; /* Format 2 */
- outbuf[4] = 32;
+ outbuf[4] = 31;
/* Sync data transfer and TCQ. */
outbuf[7] = 0x10 | (s->tcq ? 0x02 : 0);
r->buf_len = 36;
@@ -404,10 +404,11 @@ int32_t scsi_send_command(SCSIDevice *s,
p += 4;
if ((page == 8 || page == 0x3f)) {
/* Caching page. */
+ memset(p,0,20);
p[0] = 8;
p[1] = 0x12;
p[2] = 4; /* WCE */
- p += 19;
+ p += 20;
}
if ((page == 0x3f || page == 0x2a)
&& (bdrv_get_type_hint(s->bdrv) == BDRV_TYPE_CDROM)) {
@@ -437,7 +438,7 @@ int32_t scsi_send_command(SCSIDevice *s,
p[19] = (16 * 176) & 0xff;
p[20] = (16 * 176) >> 8; // 16x write speed current
p[21] = (16 * 176) & 0xff;
- p += 21;
+ p += 22;
}
r->buf_len = p - outbuf;
outbuf[0] = r->buf_len - 4;
Index: hw/lsi53c895a.c
===================================================================
RCS file: /sources/qemu/qemu/hw/lsi53c895a.c,v
retrieving revision 1.8
diff -u -p -r1.8 lsi53c895a.c
--- hw/lsi53c895a.c 22 Apr 2007 17:18:38 -0000 1.8
+++ hw/lsi53c895a.c 25 Apr 2007 04:55:11 -0000
@@ -855,6 +855,7 @@ again:
offset = sxt24(addr);
cpu_physical_memory_read(s->dsa + offset, (uint8_t *)buf, 8);
s->dbc = cpu_to_le32(buf[0]);
+ s->rbc = s->dbc;
addr = cpu_to_le32(buf[1]);
}
if ((s->sstat1 & PHASE_MASK) != ((insn >> 24) & 7)) {
@@ -864,6 +865,8 @@ again:
break;
}
s->dnad = addr;
+ /* ??? Set ESA. */
+ s->ia = s->dsp - 8;
switch (s->sstat1 & 0x7) {
case PHASE_DO:
s->waiting = 2;
@@ -898,8 +901,6 @@ again:
s->sbc = s->dbc;
s->rbc -= s->dbc;
s->ua = addr + s->dbc;
- /* ??? Set ESA. */
- s->ia = s->dsp - 8;
break;
case 1: /* IO or Read/Write instruction. */
