On Thu, 9 Nov 2023 at 15:14, Leonid Komarianskyi <leonid_komarians...@epam.com> wrote: > > Peter Maydell, thank you for your comments. > I apologize for so late response - returned to this issue and now I will > answer faster. I fixed the commit according to your recommendations, > please take a look at the new version. > > > There is also a comment or two from me in the bug report pointing > > out that the handling of wraparound is also wrong in the other > > half of this if(); we should look at that too. > > I read this topic and as I understand changing the other half of "if" is > not related to the reported issue. Since it affects running virtualized > setups on arm64 QEMU, e.g. Zephyr > (https://github.com/zephyrproject-rtos/zephyr/blob/main//boards/arm64/xenvm/doc/index.rst) > maybe is it worth merging at least this change?
I feel they're really pretty much the same thing -- when we added support for the timer offset registers we didn't correctly update the arithmetic that calculates when the next interrupt line transition happens. I've just posted my version of a patch that I think should fix both halves of the if(): https://patchew.org/QEMU/20231120173506.3729884-1-peter.mayd...@linaro.org/ Thanks for prodding me into looking at this issue again -- I had somehow got the mistaken impression that it only happened in some weird icount sleep=off situations. thanks -- PMM
