Hello, Thank you for the review and suggestions on V6.
The suggestions and changes requested from V6 are addressed in V7. Updates in Version 7 of this series are: There are no major changes done in revision 7 from revision 6. 1. The property "parent-obj-name" is removed from nest pervasive chiplet model as it is not required. 2. nest pervasive chiplet model is initialized from instance_init handler. The new qom-tree looks like below. (qemu) info qom-tree /machine (powernv10-machine) /chip[0] (power10_v2.0-pnv-chip) /n1-chiplet (pnv-N1-chiplet) /nest-pervasive-common (pnv-nest-chiplet-pervasive) /pervasive-control[0] (memory-region) /xscom-n1-chiplet-pb-scom-eq[0] (memory-region) /xscom-n1-chiplet-pb-scom-es[0] (memory-region) Patches overview in V7. PATCH1: Create a common nest pervasive chiplet model with control chiplet scom registers. PATCH2: Create a N1 chiplet model and implement powerbus scom registers. Connect common nest pervasive model to N1 chiplet model to define chiplet control scoms for N1 chiplet. PATCH3: Connect N1 chiplet model to p10 chip. Test covered: Ran make check && make check-avocado and found no obvious issues. Thank You, Chalapathi Chalapathi V (3): hw/ppc: Add pnv nest pervasive common chiplet model hw/ppc: Add N1 chiplet model hw/ppc: N1 chiplet wiring include/hw/ppc/pnv_chip.h | 2 + include/hw/ppc/pnv_n1_chiplet.h | 33 +++++ include/hw/ppc/pnv_nest_pervasive.h | 32 +++++ include/hw/ppc/pnv_xscom.h | 9 ++ hw/ppc/pnv.c | 15 ++ hw/ppc/pnv_n1_chiplet.c | 173 +++++++++++++++++++++++ hw/ppc/pnv_nest_pervasive.c | 208 ++++++++++++++++++++++++++++ hw/ppc/meson.build | 2 + 8 files changed, 474 insertions(+) create mode 100644 include/hw/ppc/pnv_n1_chiplet.h create mode 100644 include/hw/ppc/pnv_nest_pervasive.h create mode 100644 hw/ppc/pnv_n1_chiplet.c create mode 100644 hw/ppc/pnv_nest_pervasive.c -- 2.31.1