On 12/18/23 09:49, Sunil V L wrote:
Hi Heinrich,
Thanks for the patch!.
On Mon, Dec 18, 2023 at 08:40:18AM +0100, Heinrich Schuchardt wrote:
Generate SMBIOS tables for the RISC-V mach-virt.
Add CONFIG_SMBIOS=y to the RISC-V default config.
The implementation is based on the corresponding ARM and Loongson code.
With the patch the following firmware tables are provided:
etc/smbios/smbios-anchor
etc/smbios/smbios-tables
Booting Ubuntu 23.10 via EDK II allowed displaying the SMBIOS table using
the dmidecode command:
Handle 0x0100, DMI type 1, 27 bytes
System Information
Manufacturer: QEMU
Product Name: QEMU Virtual Machine
Version: virt
...
Signed-off-by: Heinrich Schuchardt <heinrich.schucha...@canonical.com>
---
hw/riscv/Kconfig | 1 +
hw/riscv/virt.c | 36 ++++++++++++++++++++++++++++++++++++
2 files changed, 37 insertions(+)
diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig
index b6a5eb4452..1e11ac9432 100644
--- a/hw/riscv/Kconfig
+++ b/hw/riscv/Kconfig
@@ -41,6 +41,7 @@ config RISCV_VIRT
select RISCV_IMSIC
select SIFIVE_PLIC
select SIFIVE_TEST
+ select SMBIOS
select VIRTIO_MMIO
select FW_CFG_DMA
select PLATFORM_BUS
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index d2eac24156..6c27cb5330 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -36,6 +36,7 @@
#include "hw/riscv/boot.h"
#include "hw/riscv/numa.h"
#include "kvm/kvm_riscv.h"
+#include "hw/firmware/smbios.h"
#include "hw/intc/riscv_aclint.h"
#include "hw/intc/riscv_aplic.h"
#include "hw/intc/riscv_imsic.h"
@@ -1249,6 +1250,39 @@ static void create_platform_bus(RISCVVirtState *s,
DeviceState *irqchip)
sysbus_mmio_get_region(sysbus, 0));
}
+static void virt_build_smbios(RISCVVirtState *s)
+{
Can we avoid duplicating this function which exists in other
architectures?
Every architecture uses it own structures (e.g. RISCVVirtState) and
constants (e.g VIRT_DRAM). As long as this is not addressed we will have
to live with this piece of code duplication.
After this patch is accepted we will have to work on improving SMBIOS
3.7.0 compliance:
* Table 22
* * field Processor Family should contain a RISC-V specfic value. Maybe
derived from TARGET_RISCV##.
* * field Processor ID should contain the value of mvendorid of hart 0
(i.e. cpu->cfg.mvendorid).
* Table 44
The required contents of this table are provided in
https://github.com/riscv/riscv-smbios .
Best regards
Heinrich
