On Wed, Dec 6, 2023 at 1:57 AM Alistair Francis <alistai...@gmail.com> wrote: > > On Mon, Nov 27, 2023 at 12:37 AM Christoph Muellner > <christoph.muell...@vrull.eu> wrote: > > > > From: Christoph Müllner <christoph.muell...@vrull.eu> > > > > Upstream Linux recently added RISC-V Zicboz support to the hwprobe API. > > This patch introduces this for QEMU's user space emulator. > > > > Signed-off-by: Christoph Müllner <christoph.muell...@vrull.eu> > > Thanks! > > Applied to riscv-to-apply.next
I just saw that this did not land yet on master. I also noticed that this patch is not in https://github.com/alistair23/qemu/tree/riscv-to-apply.next or https://github.com/alistair23/qemu/commits/riscv-to-apply.for-upstream. Was there some issue with the patch? Meanwhile a lot of additional extensions got defined in the hwprobe interface (patches are already merged in the kernel). I'll send out a patch for these in a few minutes and include this patch here as well. BR Christoph > > Alistair > > > --- > > linux-user/syscall.c | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/linux-user/syscall.c b/linux-user/syscall.c > > index 65ac3ac796..2f9a1c5279 100644 > > --- a/linux-user/syscall.c > > +++ b/linux-user/syscall.c > > @@ -8799,6 +8799,7 @@ static int do_getdents64(abi_long dirfd, abi_long > > arg2, abi_long count) > > #define RISCV_HWPROBE_EXT_ZBA (1 << 3) > > #define RISCV_HWPROBE_EXT_ZBB (1 << 4) > > #define RISCV_HWPROBE_EXT_ZBS (1 << 5) > > +#define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6) > > > > #define RISCV_HWPROBE_KEY_CPUPERF_0 5 > > #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) > > @@ -8855,6 +8856,8 @@ static void risc_hwprobe_fill_pairs(CPURISCVState > > *env, > > RISCV_HWPROBE_EXT_ZBB : 0; > > value |= cfg->ext_zbs ? > > RISCV_HWPROBE_EXT_ZBS : 0; > > + value |= cfg->ext_zicboz ? > > + RISCV_HWPROBE_EXT_ZICBOZ : 0; > > __put_user(value, &pair->value); > > break; > > case RISCV_HWPROBE_KEY_CPUPERF_0: > > -- > > 2.41.0 > > > >
