v1: 1. support uart controller both 0 and 1 base 2. fix hardcode boot address 0
v2: 1. introduce a new UART0 device name 2. remove ASPEED_SOC_SPI_BOOT_ADDR marco v3: 1. add uart helper functions to get the index, start and last. 2. add more description in commit log Jamin Lin (2): aspeed: introduce a new UART0 device name aspeed: fix hardcode boot address 0 hw/arm/aspeed.c | 17 +++++++++++------ hw/arm/aspeed_ast10x0.c | 1 + hw/arm/aspeed_ast2400.c | 6 ++++-- hw/arm/aspeed_ast2600.c | 3 ++- hw/arm/aspeed_soc_common.c | 10 ++++++---- include/hw/arm/aspeed_soc.h | 19 +++++++++++++++++-- 6 files changed, 41 insertions(+), 15 deletions(-) -- 2.25.1
