On 3/8/2024 6:15 AM, Marcin Juszkiewicz wrote: > W dniu 4.03.2024 o 11:25, Fei Wu pisze: > >> The RISC-V Server Platform specification[1] defines a standardized >> set of hardware and software capabilities, that portable system >> software, such as OS and hypervisors can rely on being present in a >> RISC-V server platform. This patchset provides a RISC-V Server >> Platform (RVSP) reference implementation on qemu which is in >> compliance with the spec as faithful as possible. > > I am working on sbsa-ref which is AArch64 Standard Server Platform > implementation. Will not go through details of rvsp-ref but give some > potential hints from my work with our platform. > Hi Marcin,
Thank you for sharing this. > > 1. Consider versioning the platform. > > We have 'platform_version'.'major/minor' exported in > DeviceTree-formatted data. This allows for firmware to know which of > non-discoverable hardware features exists and which not. We use it to > disable XHCI controller on older platform version. > Looks good, I will add it. > > 2. If specification allows to have non-discoverable devices then add some. > > This will require you to handle them in firmware in some way. Sooner or > later some physical hardware will be in same situation so they can use > your firmware code as reference. We have AHCI and XHCI on system bus > (hardcoded in firmware). > This RFC currently adds the devices like AHCI as PCI devices. > > 3. You are going to use EDK2 with ACPI. Hide DT from code there with > some hardware information library. > > For sbsa-ref we created SbsaHardwareInfoLib in > https://openfw.io/edk2-devel/20240306-no-dt-for-cpu-v6-0-acd8727a1...@linaro.org/ > patchset. > Looks good, I will ask my colleague working on FW part to take a look. Thanks, Fei.
