On Sat, 25 May 2024 at 00:29, Richard Henderson <richard.hender...@linaro.org> wrote: > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > --- > target/arm/tcg/a64.decode | 6 ++++++ > target/arm/tcg/translate-a64.c | 34 +++++++++++----------------------- > 2 files changed, 17 insertions(+), 23 deletions(-)
> @@ -10958,6 +10956,11 @@ static void disas_simd_3same_int(DisasContext *s, > uint32_t insn) > > case 0x01: /* SQADD, UQADD */ > case 0x05: /* SQSUB, UQSUB */ > + case 0x08: /* SSHL, USHL */ > + case 0x09: /* SQSHL, UQSHL */ > + case 0x0a: /* SRSHL, URSHL */ > + case 0x0b: /* SQRSHL, UQRSHL */ > + case 0x10: /* ADD, SUB */ > unallocated_encoding(s); > return; > } > @@ -11044,14 +11040,6 @@ static void disas_simd_3same_int(DisasContext *s, > uint32_t insn) > vec_full_reg_offset(s, rm), > is_q ? 16 : 8, vec_full_reg_size(s)); > return; > - > - case 0x01: /* SQADD, UQADD */ > - case 0x05: /* SQSUB, UQSUB */ > - case 0x08: /* SSHL, USHL */ > - case 0x09: /* SQSHL, UQSHL */ > - case 0x0a: /* SRSHL, URSHL */ > - case 0x0b: /* SQRSHL, UQRSHL */ > - g_assert_not_reached(); > } Shouldn't the parts of these that aren't ADD,SUB have been in some previous patches rather than this one? Otherwise Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM