Hi Helge & Richard,
Nevermind the missed review comments, I'm revisiting this
patch while looking at building libtcg-hppa.so.
On 1/2/22 00:56, Philippe Mathieu-Daudé wrote:
On 31/1/22 22:35, Helge Deller wrote:
Almost all PA-RISC machines have either a button that is labeled with
'TOC' or
a BMC/GSP function to trigger a TOC. TOC is a non-maskable interrupt
that is
sent to the processor. This can be used for diagnostic purposes like
obtaining
a stack trace/register dump or to enter KDB/KGDB in Linux.
This patch adds support for such an emulated TOC button.
It wires up the qemu monitor "nmi" command to trigger a TOC. For that it
s/qemu/QEMU/ (few others).
provides the hppa_nmi function which is assigned to the
nmi_monitor_handler
function pointer. When called it raises the EXCP_TOC hardware
interrupt in the
hppa_cpu_do_interrupt() function. The interrupt function then calls the
architecturally defined TOC function in SeaBIOS-hppa firmware (at
fixed address
0xf0000000).
According to the PA-RISC PDC specification, the SeaBIOS firmware then
writes
the CPU registers into PIM (processor internal memmory) for later
analysis. In
Typo "memory".
order to write all registers it needs to know the contents of the CPU
"shadow
registers" and the IASQ- and IAOQ-back values. The IAOQ/IASQ values are
provided by qemu in shadow registers when entering the SeaBIOS TOC
function.
This patch adds a new aritificial opcode "getshadowregs" (0xfffdead2)
which
Typo "artificial".
restores the original values of the shadow registers. With this opcode
SeaBIOS
can store those registers as well into PIM before calling an
OS-provided TOC
handler.
To trigger a TOC, switch to the qemu monitor with Ctrl-A C, and type
in the
command "nmi". After the TOC started the OS-debugger, exit the qemu
monitor
with Ctrl-A C.
IIUC you are abusing TOC to communicate with SeaBIOS, filling
iaoq_f with SeaBIOS-specific 0xf0000000, unrelated to the pa2.0
spec; is that correct?
I'm trying to see how to integrate firmware specific knowledge
into libtcg-hppa.so which is supposed to be only architectured
parts (usually we handle firmware stuffs in machine code, not
translation one).
Regards,
Phil.
Signed-off-by: Helge Deller <del...@gmx.de>
---
hw/hppa/machine.c | 35 ++++++++++++++++++++++++++++++++++-
target/hppa/cpu.c | 2 +-
target/hppa/cpu.h | 5 +++++
target/hppa/helper.h | 1 +
target/hppa/insns.decode | 1 +
target/hppa/int_helper.c | 19 ++++++++++++++++++-
target/hppa/op_helper.c | 7 ++++++-
target/hppa/translate.c | 10 ++++++++++
8 files changed, 76 insertions(+), 4 deletions(-)
+static const TypeInfo machine_hppa_machine_init_typeinfo = {
+ .name = ("hppa" "-machine"),
.name = MACHINE_TYPE_NAME("hppa"),
+ .parent = "machine",
+ .class_init = machine_hppa_machine_init_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_NMI },
+ { }
+ },
+};
