On Mon May 27, 2024 at 9:12 AM AEST, BALATON Zoltan wrote:
> Reorganise ppc_hash32_pp_prot() swapping the if legs so it does not
> test for negative first and clean up to make it shorter. Also rename
> it to ppc_hash32_prot().
Rename makes sense since it's not entirely derived from pp but
also key and nx.
Reviewed-by: Nicholas Piggin <npig...@gmail.com>
>
> Signed-off-by: BALATON Zoltan <bala...@eik.bme.hu>
> ---
> target/ppc/mmu-hash32.c | 2 +-
> target/ppc/mmu-hash32.h | 35 +++++++++++++----------------------
> target/ppc/mmu_common.c | 2 +-
> 3 files changed, 15 insertions(+), 24 deletions(-)
>
> diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c
> index d5f2057eb1..8a446c8a7d 100644
> --- a/target/ppc/mmu-hash32.c
> +++ b/target/ppc/mmu-hash32.c
> @@ -45,7 +45,7 @@ static int ppc_hash32_pte_prot(int mmu_idx,
> key = !!(mmuidx_pr(mmu_idx) ? (sr & SR32_KP) : (sr & SR32_KS));
> pp = pte.pte1 & HPTE32_R_PP;
>
> - return ppc_hash32_pp_prot(key, pp, !!(sr & SR32_NX));
> + return ppc_hash32_prot(key, pp, !!(sr & SR32_NX));
> }
>
> static target_ulong hash32_bat_size(int mmu_idx,
> diff --git a/target/ppc/mmu-hash32.h b/target/ppc/mmu-hash32.h
> index f0ce6951b4..bc4eedbecc 100644
> --- a/target/ppc/mmu-hash32.h
> +++ b/target/ppc/mmu-hash32.h
> @@ -102,49 +102,40 @@ static inline void ppc_hash32_store_hpte1(PowerPCCPU
> *cpu,
> stl_phys(CPU(cpu)->as, base + pte_offset + HASH_PTE_SIZE_32 / 2, pte1);
> }
>
> -static inline int ppc_hash32_pp_prot(bool key, int pp, bool nx)
> +static inline int ppc_hash32_prot(bool key, int pp, bool nx)
> {
> int prot;
>
> - if (key == 0) {
> + if (key) {
> switch (pp) {
> case 0x0:
> - case 0x1:
> - case 0x2:
> - prot = PAGE_READ | PAGE_WRITE;
> + prot = 0;
> break;
> -
> + case 0x1:
> case 0x3:
> prot = PAGE_READ;
> break;
> -
> + case 0x2:
> + prot = PAGE_READ | PAGE_WRITE;
> + break;
> default:
> - abort();
> + g_assert_not_reached();
> }
> } else {
> switch (pp) {
> case 0x0:
> - prot = 0;
> - break;
> -
> case 0x1:
> - case 0x3:
> - prot = PAGE_READ;
> - break;
> -
> case 0x2:
> prot = PAGE_READ | PAGE_WRITE;
> break;
> -
> + case 0x3:
> + prot = PAGE_READ;
> + break;
> default:
> - abort();
> + g_assert_not_reached();
> }
> }
> - if (nx == 0) {
> - prot |= PAGE_EXEC;
> - }
> -
> - return prot;
> + return nx ? prot : prot | PAGE_EXEC;
> }
>
> typedef struct {
> diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
> index e2542694f0..08c5b61f76 100644
> --- a/target/ppc/mmu_common.c
> +++ b/target/ppc/mmu_common.c
> @@ -120,7 +120,7 @@ static int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx,
> target_ulong pte0,
> }
> /* Keep the matching PTE information */
> ctx->raddr = pte1;
> - ctx->prot = ppc_hash32_pp_prot(ctx->key, pp, ctx->nx);
> + ctx->prot = ppc_hash32_prot(ctx->key, pp, ctx->nx);
> if (check_prot_access_type(ctx->prot, access_type)) {
> /* Access granted */
> qemu_log_mask(CPU_LOG_MMU, "PTE access granted !\n");
