06.10.2024 01:15, Richard Henderson wrote:
In tcg_out_qemu_ldst_i128, we need a non-zero index register,
which we then use as a base register in several address modes.
Since we always have TCG_REG_TMP2 available, use that.
In tcg_out_qemu_st, in the fallback when STDBRX is not available,
avoid clobbering TCG_REG_TMP1, which might be h.base, which is
still in use. Use TCG_REG_TMP2 instead. Since the final use of
h.index is that ADDI, there is no conflict with the above.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2597
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Fixes: v8.0.0-524-ge3867bad0d "tcg/ppc: Introduce HostAddress"
Fixes: v8.0.0-744-g01a112e2e9 "tcg/ppc: Reorg tcg_out_tlb_read"
Tested-By: Michael Tokarev <m...@tls.msk.ru>
Also noted for -stable.
Thank you!
/mjt