On 11/28/24 04:42, Peter Maydell wrote:
Set the FloatInfZeroNaNRule explicitly for the x86 target.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
---
target/i386/tcg/fpu_helper.c | 7 +++++++
fpu/softfloat-specialize.c.inc | 2 +-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
index 53b49bb2977..e9de084a96d 100644
--- a/target/i386/tcg/fpu_helper.c
+++ b/target/i386/tcg/fpu_helper.c
@@ -173,6 +173,13 @@ void cpu_init_fp_statuses(CPUX86State *env)
*/
set_float_2nan_prop_rule(float_2nan_prop_x87, &env->mmx_status);
set_float_2nan_prop_rule(float_2nan_prop_x87, &env->sse_status);
+ /*
+ * Only SSE has multiply-add instructions.
+ * TODO: this might be wrong, as we never implemented any x86-specific
+ * handling for the NaN case for multiply-add. This needs to be checked
+ * against the manual.
+ */
+ set_float_infzeronan_rule(float_infzeronan_dnan_never, &env->sse_status);
This is correct.
Section 14.5.2 Fused-Multiply-ADD (FMA) Numeric Behavior has table 14-17 FMA Numeric
Behavior. It boils down to selecting the first NaN from A * B + C. Row 3 specifically
documents C as the result for A and B both in {0, Finite, Inf}, which includes the infzero
case.
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
r~
