Hi Richard, December 6, 2024 at 8:42 PM, "Richard Henderson" wrote: > On 12/6/24 13:02, Pierrick Bouvier wrote: > > On 12/6/24 00:42, Julian Ganz wrote: > > > IIUC qemu will schedule interrupts "opportunistically" between tb > > > executions. If that's the case we'll observe interrupts exclusively > > > after the last instruction in a tb. That strikes me as a serious > > > limitation. > > > > > To reuse fancy vocabulary, maybe we should have a distinction between > > inferable > interruptions (interrupt instruction) and uninferable > > interrupts, triggered by an external > event. > > In the latter, it *might* be acceptable to not provide a from_pc (let's > > say a value 0), > because there is no useful information in itself, except > > creating random edges in the > control flow graph, which we don't want to > > do. > > What do you think of it? > > > I think you both are over-complicating things. > > Always, env->pc (or whatever) within cc->cpu_exec_interrupt *is* where the > interrupt is recognized, and *is* where the discontinuity occurs. Report that.
Glad to hear. This means what I naïvely did for most targets should be correct at least in this regard. Regards, Julian