Sorry for the quick repost. Changes since v9: - Add element-wise loop to handle case where no suitable atomic operation is available.
Changes since v8: - Add missing CONFIG_ATOMIC64 guard. Previous versions: - v1: https://lore.kernel.org/all/20240717153040.11073-1-paolo.sav...@embecosm.com/ - v2: https://lore.kernel.org/all/20241002135708.99146-1-paolo.sav...@embecosm.com/ - v3: https://lore.kernel.org/all/20241014220153.196183-1-paolo.sav...@embecosm.com/ - v4: https://lore.kernel.org/all/20241029194348.59574-1-paolo.sav...@embecosm.com/ - v5: https://lore.kernel.org/all/20241211143118.661268-1-craig.blackm...@embecosm.com/ - v6: https://lore.kernel.org/all/20241218142937.1028602-1-craig.blackm...@embecosm.com/ - v7: https://lore.kernel.org/all/20241220122109.2083215-1-craig.blackm...@embecosm.com/ - v8: https://lore.kernel.org/all/20250108143523.153010-1-craig.blackm...@embecosm.com/ - v9: https://lore.kernel.org/all/20250109152833.75385-1-craig.blackm...@embecosm.com/ Cc: Richard Henderson <richard.hender...@linaro.org> Cc: Palmer Dabbelt <pal...@dabbelt.com> Cc: Alistair Francis <alistair.fran...@wdc.com> Cc: Bin Meng <bmeng...@gmail.com> Cc: Weiwei Li <liwei1...@gmail.com> Cc: Daniel Henrique Barboza <dbarb...@ventanamicro.com> Cc: Liu Zhiwei <zhiwei_...@linux.alibaba.com> Cc: Helene Chelin <helene.che...@embecosm.com> Cc: Nathan Egge <ne...@google.com> Cc: Max Chou <max.c...@sifive.com> Craig Blackmore (1): target/riscv: rvv: Use wider accesses for unit stride load/store target/riscv/vector_helper.c | 95 +++++++++++++++++++++++++++++++++--- 1 file changed, 87 insertions(+), 8 deletions(-) -- 2.43.0
