On Thu, 26 Dec 2024 at 08:28, Hao Wu <[email protected]> wrote: > > The PCS exists in NPCM8XX's GMAC1 and is used to control the SGMII > PHY. This implementation contains all the default registers and > the soft reset feature that are required to load the Linux kernel > driver. Further features have not been implemented yet. > > Signed-off-by: Hao Wu <[email protected]> > --- > hw/net/meson.build | 1 + > hw/net/npcm_pcs.c | 410 ++++++++++++++++++++++++++++++++++++++ > hw/net/trace-events | 4 +- > include/hw/net/npcm_pcs.h | 42 ++++ > 4 files changed, 455 insertions(+), 2 deletions(-) > create mode 100644 hw/net/npcm_pcs.c > create mode 100644 include/hw/net/npcm_pcs.h >
Reviewed-by: Peter Maydell <[email protected]> for basic structure, but it would be good if somebody who knows the hardware reviewed it for whether it's actually implementing the right thing. thanks -- PMM
