On 6/2/25 23:11, Hao Wu wrote:
NPCM8XX adds a few new registers and have a different set of reset
values to the CLK modules. This patch supports them.
This patch doesn't support the new clock values generated by these
registers. Currently no modules use these new clock values so they
are not necessary at this point.
Implementation of these clocks might be required when implementing
these modules.
Reviewed-by: Titus Rwantare <tit...@google.com>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Hao Wu <wuhao...@google.com>
---
hw/misc/npcm_clk.c | 113 +++++++++++++++++++++++++++++++++++--
include/hw/misc/npcm_clk.h | 10 +++-
2 files changed, 117 insertions(+), 6 deletions(-)
diff --git a/include/hw/misc/npcm_clk.h b/include/hw/misc/npcm_clk.h
index f47614ac8d..8fa1e14bdd 100644
--- a/include/hw/misc/npcm_clk.h
+++ b/include/hw/misc/npcm_clk.h
@@ -1,5 +1,5 @@
/*
- * Nuvoton NPCM7xx Clock Control Registers.
+ * Nuvoton NPCM7xx/8xx Clock Control Registers.
*
* Copyright 2020 Google LLC
*
@@ -21,11 +21,12 @@
#include "hw/sysbus.h"
#define NPCM7XX_CLK_NR_REGS (0x70 / sizeof(uint32_t))
+#define NPCM8XX_CLK_NR_REGS (0xc4 / sizeof(uint32_t))
/*
* Number of maximum registers in NPCM device state structure. Don't change
* this without incrementing the version_id in the vmstate.
*/
-#define NPCM_CLK_MAX_NR_REGS NPCM7XX_CLK_NR_REGS
+#define NPCM_CLK_MAX_NR_REGS NPCM8XX_CLK_NR_REGS
This also breaks vmstate_npcm_clk migration.
