Am 29.04.2012 10:32, schrieb Avi Kivity:
> On 04/28/2012 09:46 PM, Andreas Färber wrote:
>> Am 14.04.2012 22:48, schrieb Hervé Poussineau:
>>> Register is one byte-wide (as per specification), so there is no need to 
>>> specify endianness.
>> The region was 4 bytes before, now it's 1. What happens when a 4-byte
>> read is attempted at that address? Do we need to specify the valid
>> widths for the MemoryRegion? Or is such a read constructed from this
>> region and (assuming) the return value of an unassigned read?
> This area of what happens during access that falls across region
> boundaries is very underspecified in qemu; nor is it clear what happens
> in real hardware (in all its variations).

So, what's your conclusion here? Should we add .valid.max_access_size =
1? Or shall I apply as is?


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