hexagon architecture system emulation: part 2/3
This series includes the k0 and TLB locking implementation. This was briefly
discussed on-list at
https://lists.nongnu.org/archive/html/qemu-devel/2024-01/msg04801.html
and perhaps we can continue/follow-up discussion on the relevant patch(es)
in this series.
Brian Cain (38):
target/hexagon: Implement ciad helper
target/hexagon: Implement {c,}swi helpers
target/hexagon: Implement iassign{r,w} helpers
target/hexagon: Implement start/stop helpers
target/hexagon: Implement modify SSR
target/hexagon: Implement {g,s}etimask helpers
target/hexagon: Implement wait helper
target/hexagon: Implement get_exe_mode()
target/hexagon: Implement arch_get_system_reg()
target/hexagon: Implement arch_{s,g}et_{thread,system}_reg()
target/hexagon: Add representation to count cycles
target/hexagon: Add implementation of cycle counters
target/hexagon: Implement modify_syscfg()
target/hexagon: Add system event, cause codes
target/hexagon: Implement hex_tlb_entry_get_perm()
target/hexagon: Implement hex_tlb_lookup_by_asid()
target/hexagon: Implement software interrupt
target/hexagon: Implement exec_interrupt, set_irq
target/hexagon: Implement hexagon_tlb_fill()
target/hexagon: Implement siad inst
target/hexagon: Implement hexagon_resume_threads()
target/hexagon: Implement setprio, resched
target/hexagon: Add sysemu_ops, cpu_get_phys_page_debug()
target/hexagon: Add exec-start-addr prop
target/hexagon: Add hexagon_cpu_mmu_index()
target/hexagon: Decode trap1, rte as COF
target/hexagon: Implement hexagon_find_last_irq()
target/hexagon: Implement modify_ssr, resched, pending_interrupt
target/hexagon: Add pkt_ends_tb to translation
target/hexagon: Add next_PC, {s,g}reg writes
target/hexagon: Add implicit sysreg writes
target/hexagon: Define system, guest reg names
target/hexagon: initialize sys/guest reg TCGvs
target/hexagon: Add TLB, k0 {un,}lock
target/hexagon: Define gen_precise_exception()
target/hexagon: Add TCG overrides for transfer insts
target/hexagon: Add support for loadw_phys
target/hexagon: Add pcycle setting functionality
Matheus Tavares Bernardino (1):
target/hexagon: Add guest reg reading functionality
target/hexagon/cpu.h | 51 +++-
target/hexagon/cpu_bits.h | 56 +++-
target/hexagon/cpu_helper.h | 19 +-
target/hexagon/gen_tcg.h | 7 -
target/hexagon/gen_tcg_sys.h | 25 ++
target/hexagon/helper.h | 5 +-
target/hexagon/hexswi.h | 17 ++
target/hexagon/internal.h | 2 +
target/hexagon/sys_macros.h | 8 +-
target/hexagon/translate.h | 5 +
target/hexagon/reg_fields_def.h.inc | 11 +
target/hexagon/cpu.c | 336 +++++++++++++++++++-
target/hexagon/cpu_helper.c | 374 ++++++++++++++++++++++-
target/hexagon/decode.c | 14 +
target/hexagon/genptr.c | 7 +-
target/hexagon/hex_mmu.c | 80 ++++-
target/hexagon/hexswi.c | 258 ++++++++++++++++
target/hexagon/machine.c | 25 +-
target/hexagon/op_helper.c | 423 ++++++++++++++++++++++++--
target/hexagon/translate.c | 315 +++++++++++++++++--
target/hexagon/hex_common.py | 3 +
target/hexagon/imported/encode_pp.def | 1 +
target/hexagon/imported/ldst.idef | 3 +
23 files changed, 1938 insertions(+), 107 deletions(-)
create mode 100644 target/hexagon/hexswi.h
create mode 100644 target/hexagon/hexswi.c
--
2.34.1
