On Tue, 2025-03-04 at 01:52 +0800, Tomita Moeko wrote:
> Though GTT Stolen Memory (GSM) is right below Data Stolen Memory (DSM)
> in host address space, direct access to GSM is prohibited, and it is
> not mapped to guest address space. Both host and guest accesses GSM
> indirectly through the second half of MMIO BAR0 (GTTMMADR).
> 
> Guest firmware only need to reserve a memory region for DSM and program
> the BDSM register with the base address of that region, that's actually
> what both SeaBIOS[1] and OVMF does now.
> 

When was this merged to OVMF?

> [1]
> https://gitlab.com/qemu-project/seabios/-/blob/1.12-stable/src/fw/pciinit.c#L319-332
> 
> Signed-off-by: Tomita Moeko <tomitamo...@gmail.com>
> ---
>  hw/vfio/igd.c | 28 +++-------------------------
>  1 file changed, 3 insertions(+), 25 deletions(-)
> 
> diff --git a/hw/vfio/igd.c b/hw/vfio/igd.c
> index ca3a32f4f2..dda4c7bb5d 100644
> --- a/hw/vfio/igd.c
> +++ b/hw/vfio/igd.c
> @@ -112,28 +112,8 @@ static int igd_gen(VFIOPCIDevice *vdev)
>  
>  #define IGD_GMCH_GEN6_GMS_SHIFT     3       /* SNB_GMCH in i915 */
>  #define IGD_GMCH_GEN6_GMS_MASK      0x1f
> -#define IGD_GMCH_GEN6_GGMS_SHIFT    8
> -#define IGD_GMCH_GEN6_GGMS_MASK     0x3
>  #define IGD_GMCH_GEN8_GMS_SHIFT     8       /* BDW_GMCH in i915 */
>  #define IGD_GMCH_GEN8_GMS_MASK      0xff
> -#define IGD_GMCH_GEN8_GGMS_SHIFT    6
> -#define IGD_GMCH_GEN8_GGMS_MASK     0x3
> -
> -static uint64_t igd_gtt_memory_size(int gen, uint16_t gmch)
> -{
> -    uint64_t ggms;
> -
> -    if (gen < 8) {
> -        ggms = (gmch >> IGD_GMCH_GEN6_GGMS_SHIFT) & IGD_GMCH_GEN6_GGMS_MASK;
> -    } else {
> -        ggms = (gmch >> IGD_GMCH_GEN8_GGMS_SHIFT) & IGD_GMCH_GEN8_GGMS_MASK;
> -        if (ggms != 0) {
> -            ggms = 1ULL << ggms;
> -        }
> -    }
> -
> -    return ggms * MiB;
> -}
>  
>  static uint64_t igd_stolen_memory_size(int gen, uint32_t gmch)
>  {
> @@ -367,7 +347,7 @@ void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int
> nr)
>      g_autofree struct vfio_region_info *lpc = NULL;
>      PCIDevice *lpc_bridge;
>      int ret, gen;
> -    uint64_t ggms_size, gms_size;
> +    uint64_t gms_size;
>      uint64_t *bdsm_size;
>      uint32_t gmch;
>      Error *err = NULL;
> @@ -527,7 +507,6 @@ void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int
> nr)
>          }
>      }
>  
> -    ggms_size = igd_gtt_memory_size(gen, gmch);
>      gms_size = igd_stolen_memory_size(gen, gmch);
>  
>      /*
> @@ -539,7 +518,7 @@ void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int
> nr)
>       * config offset 0x5C.
>       */
>      bdsm_size = g_malloc(sizeof(*bdsm_size));
> -    *bdsm_size = cpu_to_le64(ggms_size + gms_size);
> +    *bdsm_size = cpu_to_le64(gms_size);
>      fw_cfg_add_file(fw_cfg_find(), "etc/igd-bdsm-size",
>                      bdsm_size, sizeof(*bdsm_size));
>  
> @@ -559,6 +538,5 @@ void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int
> nr)
>          pci_set_quad(vdev->emulated_config_bits + IGD_BDSM_GEN11, ~0);
>      }
>  
> -    trace_vfio_pci_igd_bdsm_enabled(vdev->vbasedev.name,
> -                                    (ggms_size + gms_size) / MiB);
> +    trace_vfio_pci_igd_bdsm_enabled(vdev->vbasedev.name, (gms_size / MiB));
>  }

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