> -----Original Message----- > From: Daniel P. Berrangé <berra...@redhat.com> > Sent: Wednesday, March 12, 2025 4:39 PM > To: Shameerali Kolothum Thodi <shameerali.kolothum.th...@huawei.com> > Cc: eric.au...@redhat.com; qemu-...@nongnu.org; qemu- > de...@nongnu.org; peter.mayd...@linaro.org; j...@nvidia.com; > nicol...@nvidia.com; ddut...@redhat.com; nath...@nvidia.com; > mo...@nvidia.com; smost...@google.com; Linuxarm > <linux...@huawei.com>; Wangzhou (B) <wangzh...@hisilicon.com>; > jiangkunkun <jiangkun...@huawei.com>; Jonathan Cameron > <jonathan.came...@huawei.com>; zhangfei....@linaro.org > Subject: Re: [RFC PATCH v2 05/20] hw/arm/smmuv3-accel: Associate a pxb- > pcie bus > > On Wed, Mar 12, 2025 at 04:34:18PM +0000, Shameerali Kolothum Thodi > wrote: > > Hi Eric, > > > > > -----Original Message----- > > > From: Eric Auger <eric.au...@redhat.com> > > > Sent: Wednesday, March 12, 2025 4:08 PM > > > To: Shameerali Kolothum Thodi > > > <shameerali.kolothum.th...@huawei.com>; qemu-...@nongnu.org; > > > qemu-devel@nongnu.org > > > Cc: peter.mayd...@linaro.org; j...@nvidia.com; nicol...@nvidia.com; > > > ddut...@redhat.com; berra...@redhat.com; nath...@nvidia.com; > > > mo...@nvidia.com; smost...@google.com; Linuxarm > > > <linux...@huawei.com>; Wangzhou (B) <wangzh...@hisilicon.com>; > > > jiangkunkun <jiangkun...@huawei.com>; Jonathan Cameron > > > <jonathan.came...@huawei.com>; zhangfei....@linaro.org > > > Subject: Re: [RFC PATCH v2 05/20] hw/arm/smmuv3-accel: Associate a > pxb- > > > pcie bus > > > > > > Hi Shameer, > > > > > > > > > On 3/11/25 3:10 PM, Shameer Kolothum wrote: > > > > User must associate a pxb-pcie root bus to smmuv3-accel > > > > and that is set as the primary-bus for the smmu dev. > > > why do we require a pxb-pcie root bus? why can't pci.0 root bus be used > > > for simpler use cases (ie. I just want to passthough a NIC in > > > accelerated mode). Or may pci.0 is also called a pax-pcie root bus? > > > > The idea was since pcie.0 is the default RC with virt, leave that to cases > where > > we want to attach any emulated devices and use pxb-pcie based RCs for > vfio-pci. > > The majority of management applications will never do anything other > than a flat PCI(e) topology by default. Some might enable pxb-pcie as > an optional but plenty won't ever support it. If you want to maximise > the potential usefulness of the ssmmuv3-accel, and it is technically > viable, it would be worth permitting choice of attachment to the root > bus as an alteranative to the pxb.
Ok. I will look into this. Though I am not sure when we have smmuv3-accel to pcie.0 we can still have additional smmuv3-accel with pxb-pcie or not. It looks like pxb-pcie will be plugged into pcie.0. And if that is the case IORT mappings will be difficult I guess. I need to double check. Thanks, Shameer
